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Searched refs:ixSYSHUB_MMREG_IND_DMA_CLK1_SW1_CL2_CNTL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h3632 #define ixSYSHUB_MMREG_IND_DMA_CLK1_SW1_CL2_CNTL macro
Dnbio_7_0_offset.h4615 #define ixSYSHUB_MMREG_IND_DMA_CLK1_SW1_CL2_CNTL macro