/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
D | dp.c | 46 nvkm_dp_train_sense(struct lt_state *lt, bool pc, u32 delay) in nvkm_dp_train_sense() argument 48 struct nvkm_dp *dp = lt->dp; in nvkm_dp_train_sense() 56 ret = nvkm_rdaux(dp->aux, DPCD_LS02, lt->stat, 6); in nvkm_dp_train_sense() 61 ret = nvkm_rdaux(dp->aux, DPCD_LS0C, <->pc2stat, 1); in nvkm_dp_train_sense() 63 lt->pc2stat = 0x00; in nvkm_dp_train_sense() 65 lt->stat, lt->pc2stat); in nvkm_dp_train_sense() 67 OUTP_TRACE(&dp->outp, "status %6ph", lt->stat); in nvkm_dp_train_sense() 74 nvkm_dp_train_drive(struct lt_state *lt, bool pc) in nvkm_dp_train_drive() argument 76 struct nvkm_dp *dp = lt->dp; in nvkm_dp_train_drive() 86 u8 lane = (lt->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_drive() [all …]
|
D | dp.h | 30 } lt; member
|
D | rootnv50.c | 239 dp->lt.mst = !!args->v0.state; in nv50_disp_root_mthd_()
|
/drivers/mtd/nand/raw/ |
D | marvell_nand.c | 1026 const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout; in marvell_nfc_hw_ecc_hmg_do_read_page() local 1036 unsigned int oob_bytes = lt->spare_bytes + (raw ? lt->ecc_bytes : 0); in marvell_nfc_hw_ecc_hmg_do_read_page() 1061 lt->data_bytes + oob_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page() 1062 memcpy(data_buf, nfc->dma_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page() 1063 memcpy(oob_buf, nfc->dma_buf + lt->data_bytes, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page() 1065 marvell_nfc_xfer_data_in_pio(nfc, data_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page() 1084 const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout; in marvell_nfc_hw_ecc_hmg_read_page() local 1085 unsigned int full_sz = lt->data_bytes + lt->spare_bytes + lt->ecc_bytes; in marvell_nfc_hw_ecc_hmg_read_page() 1108 lt->data_bytes, true, page); in marvell_nfc_hw_ecc_hmg_read_page() 1140 const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout; in marvell_nfc_hw_ecc_hmg_do_write_page() local [all …]
|
/drivers/media/platform/rockchip/rga/ |
D | rga-hw.c | 50 struct rga_addr_offset *lt, *lb, *rt, *rb; in rga_get_addr_offset() local 54 lt = &offsets.left_top; in rga_get_addr_offset() 65 lt->y_off = y * frm->stride + x * pixel_width; in rga_get_addr_offset() 66 lt->u_off = in rga_get_addr_offset() 68 lt->v_off = lt->u_off + frm->width * frm->height / uv_factor; in rga_get_addr_offset() 70 lb->y_off = lt->y_off + (h - 1) * frm->stride; in rga_get_addr_offset() 71 lb->u_off = lt->u_off + (h / y_div - 1) * uv_stride; in rga_get_addr_offset() 72 lb->v_off = lt->v_off + (h / y_div - 1) * uv_stride; in rga_get_addr_offset() 74 rt->y_off = lt->y_off + (w - 1) * pixel_width; in rga_get_addr_offset() 75 rt->u_off = lt->u_off + w / x_div - 1; in rga_get_addr_offset() [all …]
|
/drivers/net/ethernet/marvell/octeontx2/af/ |
D | rvu_npc.c | 738 int lid, lt, ld, fl; in npc_program_mkex_profile() local 750 for (lt = 0; lt < NPC_MAX_LT; lt++) { in npc_program_mkex_profile() 752 SET_KEX_LD(NIX_INTF_RX, lid, lt, ld, in npc_program_mkex_profile() 754 [lid][lt][ld]); in npc_program_mkex_profile() 756 SET_KEX_LD(NIX_INTF_TX, lid, lt, ld, in npc_program_mkex_profile() 758 [lid][lt][ld]); in npc_program_mkex_profile() 2220 #define GET_KEX_LD(intf, lid, lt, ld) \ argument 2222 NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, lt, ld)) 2231 int lid, lt, ld, fl; in rvu_mbox_handler_npc_get_kex_cfg() local 2236 for (lt = 0; lt < NPC_MAX_LT; lt++) { in rvu_mbox_handler_npc_get_kex_cfg() [all …]
|
/drivers/power/supply/ |
D | bq25890_charger.c | 296 struct bq25890_lookup lt; member 310 [TBL_TREG] = { .lt = {bq25890_treg_tbl, BQ25890_TREG_TBL_SIZE} }, 311 [TBL_BOOSTI] = { .lt = {bq25890_boosti_tbl, BQ25890_BOOSTI_TBL_SIZE} } 338 const u32 *tbl = bq25890_tables[id].lt.tbl; in bq25890_find_idx() 339 u32 tbl_size = bq25890_tables[id].lt.size; in bq25890_find_idx() 364 return bq25890_tables[id].lt.tbl[idx]; in bq25890_find_val()
|
/drivers/gpu/drm/amd/display/dc/dsc/ |
D | Makefile | 14 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
|
/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | Makefile | 17 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
|
/drivers/gpu/drm/amd/display/dc/calcs/ |
D | Makefile | 37 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
|
/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | Makefile | 21 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
|
/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | Makefile | 50 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
|
/drivers/gpu/drm/amd/display/dc/dml/ |
D | Makefile | 37 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
|
/drivers/scsi/be2iscsi/ |
D | be_main.h | 711 u8 lt; /* DWORD 0 */ member 779 u8 lt; /* DWORD 11 */ member 867 u8 lt; /* DWORD 0 */ member
|
/drivers/hid/ |
D | hid-wiimote-modules.c | 1046 __s8 rx, ry, lx, ly, lt, rt; in wiimod_classic_in_ext() local 1121 lt = (ext[2] >> 2) & 0x18; in wiimod_classic_in_ext() 1122 lt |= (ext[3] >> 5) & 0x07; in wiimod_classic_in_ext() 1127 lt <<= 1; in wiimod_classic_in_ext() 1134 input_report_abs(wdata->extension.input, ABS_HAT3Y, lt); in wiimod_classic_in_ext()
|
/drivers/net/ethernet/cavium/liquidio/ |
D | lio_main.c | 624 struct lio_time *lt; in lio_sync_octeon_time() local 634 lt = (struct lio_time *)sc->virtdptr; in lio_sync_octeon_time() 638 lt->sec = ts.tv_sec; in lio_sync_octeon_time() 639 lt->nsec = ts.tv_nsec; in lio_sync_octeon_time() 640 octeon_swap_8B_data((u64 *)lt, (sizeof(struct lio_time)) / 8); in lio_sync_octeon_time()
|
/drivers/infiniband/core/ |
D | verbs.c | 232 enum rdma_transport_type lt; in rdma_port_get_link_layer() local 236 lt = rdma_node_get_transport(device->node_type); in rdma_port_get_link_layer() 237 if (lt == RDMA_TRANSPORT_IB) in rdma_port_get_link_layer()
|
/drivers/memory/tegra/ |
D | tegra210-emc-cc-r21021.c | 407 #define __COPY_EMA(nt, lt, dev) \ in periodic_compensation_handler() argument 408 ({ __MOVAVG(nt, dev) = __MOVAVG(lt, dev) * \ in periodic_compensation_handler()
|