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Searched refs:match_value (Results 1 – 25 of 27) sorted by relevance

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/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_dpipe.c125 struct devlink_dpipe_value *match_value, in mlxsw_sp_erif_entry_prepare() argument
130 entry->match_values = match_value; in mlxsw_sp_erif_entry_prepare()
136 match_value->match = match; in mlxsw_sp_erif_entry_prepare()
137 match_value->value_size = sizeof(u32); in mlxsw_sp_erif_entry_prepare()
138 match_value->value = kmalloc(match_value->value_size, GFP_KERNEL); in mlxsw_sp_erif_entry_prepare()
139 if (!match_value->value) in mlxsw_sp_erif_entry_prepare()
150 kfree(match_value->value); in mlxsw_sp_erif_entry_prepare()
195 struct devlink_dpipe_value match_value, action_value; in mlxsw_sp_dpipe_table_erif_entries_dump() local
204 memset(&match_value, 0, sizeof(match_value)); in mlxsw_sp_dpipe_table_erif_entries_dump()
208 err = mlxsw_sp_erif_entry_prepare(&entry, &match_value, &match, in mlxsw_sp_dpipe_table_erif_entries_dump()
[all …]
/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
Dfs_tcp.c32 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ip_protocol, IPPROTO_TCP); in accel_fs_tcp_set_ipv4_flow()
34 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ip_version, 4); in accel_fs_tcp_set_ipv4_flow()
35 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in accel_fs_tcp_set_ipv4_flow()
38 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in accel_fs_tcp_set_ipv4_flow()
51 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ip_protocol, IPPROTO_TCP); in accel_fs_tcp_set_ipv6_flow()
53 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ip_version, 6); in accel_fs_tcp_set_ipv6_flow()
54 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in accel_fs_tcp_set_ipv6_flow()
57 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in accel_fs_tcp_set_ipv6_flow()
128 MLX5_SET(fte_match_param, spec->match_value, outer_headers.tcp_dport, in mlx5e_accel_fs_add_sk()
130 MLX5_SET(fte_match_param, spec->match_value, outer_headers.tcp_sport, in mlx5e_accel_fs_add_sk()
Dipsec_fs.c414 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ip_version, ip_version); in setup_fte_common()
418 MLX5_SET(fte_match_param, spec->match_value, outer_headers.frag, 0); in setup_fte_common()
422 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ip_protocol, IPPROTO_ESP); in setup_fte_common()
426 MLX5_SET(fte_match_param, spec->match_value, misc_parameters.outer_esp_spi, in setup_fte_common()
430 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in setup_fte_common()
433 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in setup_fte_common()
441 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in setup_fte_common()
444 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in setup_fte_common()
563 MLX5_SET(fte_match_param, spec->match_value, misc_parameters_2.metadata_reg_a, in tx_add_rule()
/drivers/pwm/
Dpwm-omap-dmtimer.c157 u32 load_value, match_value; in pwm_omap_dmtimer_config() local
229 match_value = load_value + duty_cycles - 1; in pwm_omap_dmtimer_config()
232 omap->pdata->set_match(omap->dm_timer, true, match_value); in pwm_omap_dmtimer_config()
235 load_value, load_value, match_value, match_value); in pwm_omap_dmtimer_config()
/drivers/net/ethernet/mellanox/mlx5/core/
Den_arfs.c461 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ethertype, in arfs_add_rule()
475 MLX5_SET(fte_match_param, spec->match_value, outer_headers.tcp_dport, in arfs_add_rule()
477 MLX5_SET(fte_match_param, spec->match_value, outer_headers.tcp_sport, in arfs_add_rule()
484 MLX5_SET(fte_match_param, spec->match_value, outer_headers.udp_dport, in arfs_add_rule()
486 MLX5_SET(fte_match_param, spec->match_value, outer_headers.udp_sport, in arfs_add_rule()
490 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in arfs_add_rule()
494 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in arfs_add_rule()
503 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in arfs_add_rule()
507 memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, in arfs_add_rule()
Den_fs.c191 MLX5_SET(fte_match_param, spec->match_value, outer_headers.cvlan_tag, 1); in __mlx5e_add_vlan_rule()
197 MLX5_SET(fte_match_param, spec->match_value, outer_headers.svlan_tag, 1); in __mlx5e_add_vlan_rule()
203 MLX5_SET(fte_match_param, spec->match_value, outer_headers.svlan_tag, 1); in __mlx5e_add_vlan_rule()
206 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, in __mlx5e_add_vlan_rule()
213 MLX5_SET(fte_match_param, spec->match_value, outer_headers.cvlan_tag, 1); in __mlx5e_add_vlan_rule()
216 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, in __mlx5e_add_vlan_rule()
838 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ip_protocol, proto); in mlx5e_generate_ttc_rule()
845 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ip_version, ipv); in mlx5e_generate_ttc_rule()
849 MLX5_SET(fte_match_param, spec->match_value, outer_headers.ethertype, etype); in mlx5e_generate_ttc_rule()
1011 MLX5_SET(fte_match_param, spec->match_value, inner_headers.ip_version, ipv); in mlx5e_generate_inner_ttc_rule()
[all …]
Deswitch_offloads.c269 misc2 = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters_2); in mlx5_eswitch_set_rule_source_port()
280 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters); in mlx5_eswitch_set_rule_source_port()
784 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters); in mlx5_eswitch_add_send_to_vport_rule()
879 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in peer_miss_rules_setup()
908 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in esw_set_peer_miss_rule_source_port()
914 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in esw_set_peer_miss_rule_source_port()
946 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in esw_add_fdb_peer_miss_rules()
1069 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, in esw_add_fdb_miss_rule()
1112 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in esw_add_restore_rule()
1563 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters_2); in mlx5_eswitch_create_vport_rx_rule()
[all …]
Drdma.c81 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in mlx5_rdma_enable_roce_steering()
Deswitch_offloads_termtbl.c207 port_value = MLX5_GET(fte_match_param, spec->match_value, in mlx5_eswitch_offload_is_uplink_port()
Dfs_core.c407 if (spec->match_value[i] & ~spec->match_criteria[i]) { in check_valid_spec()
674 memcpy(fte->val, &spec->match_value, sizeof(fte->val)); in alloc_fte()
1786 const u32 *match_value, in lookup_fte_locked() argument
1795 fte_tmp = rhashtable_lookup_fast(&g->ftes_hash, match_value, in lookup_fte_locked()
1849 fte_tmp = lookup_fte_locked(g, spec->match_value, take_write); in try_add_to_existing_fg()
Den_tc.c204 void *headers_v = spec->match_value; in mlx5e_tc_match_to_reg_match()
228 void *headers_v = spec->match_value; in mlx5e_tc_match_to_reg_get_match()
813 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers); in mlx5e_hairpin_get_prio()
1461 spec->match_value, in mlx5_flow_has_geneve_opt()
2190 return MLX5_ADDR_OF(fte_match_param, spec->match_value, in get_match_inner_headers_value()
2202 return MLX5_ADDR_OF(fte_match_param, spec->match_value, in get_match_outer_headers_value()
2283 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, in __parse_cls_flower()
2287 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, in __parse_cls_flower()
Deswitch.c208 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, in __esw_fdb_set_vport_rule()
219 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in __esw_fdb_set_vport_rule()
2126 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters); in _mlx5_eswitch_set_vepa_locked()
Dfs_cmd.c477 match_value); in mlx5_cmd_set_fte()
/drivers/net/ethernet/mellanox/mlx5/core/en/
Dtc_tun_geneve.c133 misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters); in mlx5e_tc_tun_parse_geneve_vni()
170 misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters); in mlx5e_tc_tun_parse_geneve_options()
172 misc_3_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters_3); in mlx5e_tc_tun_parse_geneve_options()
287 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters); in mlx5e_tc_tun_parse_geneve_params()
Dtc_tun_gre.c62 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters); in mlx5e_tc_tun_parse_gretap()
Dtc_tun_mplsoudp.c70 misc2_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, in parse_tunnel()
Dtc_tun_vxlan.c115 misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters); in mlx5e_tc_tun_parse_vxlan()
Dtc_tun.c505 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, in mlx5e_tc_tun_parse()
/drivers/clocksource/
Dsh_cmt.c102 u32 match_value; member
460 if (has_wrapped && (new_match > ch->match_value)) { in sh_cmt_clock_event_program_verify()
478 ch->match_value = new_match; in sh_cmt_clock_event_program_verify()
489 ch->match_value = new_match; in sh_cmt_clock_event_program_verify()
543 ch->total_cycles += ch->match_value + 1; in sh_cmt_interrupt()
569 || (ch->match_value == ch->next_match_value)) in sh_cmt_interrupt()
642 raw += ch->match_value + 1; in sh_cmt_clocksource_read()
913 ch->match_value = ch->max_match_value; in sh_cmt_setup_channel()
/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/
Dhelper.c62 MLX5_SET_TO_ONES(fte_match_param, spec->match_value, outer_headers.cvlan_tag); in esw_egress_acl_vlan_create()
64 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, vlan_id); in esw_egress_acl_vlan_create()
Dingress_ofld.c35 MLX5_SET(fte_match_param, spec->match_value, outer_headers.cvlan_tag, 0); in esw_acl_ingress_prio_tag_create()
Dingress_lgcy.c216 spec->match_value, in esw_acl_ingress_lgcy_setup()
/drivers/pci/
Dpci-acpi.c421 u32 match_value; member
539 if ((match_reg & reg->match_mask_and) != reg->match_value) in program_hpx_type3_register()
580 hpx3_reg->match_value = reg_fields[10].integer.value; in parse_hpx3_register()
/drivers/infiniband/hw/mlx5/
Dfs.c201 u32 *match_v = spec->match_value; in parse_flow_attr()
857 void *misc_params_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, in set_underlay_qp()
878 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in mlx5_ib_set_rule_source_port()
890 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, in mlx5_ib_set_rule_source_port()
1409 memcpy(spec->match_value, cmd_in, inlen); in _create_raw_flow_rule()
/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_cmd.c603 match_value); in mlx5dr_cmd_set_fte()

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