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Searched refs:mc_readl (Results 1 – 6 of 6) sorted by relevance

/drivers/memory/tegra/
Dmc.c53 value = mc_readl(mc, rst->control) | BIT(rst->bit); in tegra_mc_block_dma_common()
64 return (mc_readl(mc, rst->status) & BIT(rst->bit)) != 0; in tegra_mc_dma_idling_common()
75 value = mc_readl(mc, rst->control) & ~BIT(rst->bit); in tegra_mc_unblock_dma_common()
86 return (mc_readl(mc, rst->control) & BIT(rst->bit)) != 0; in tegra_mc_reset_status_common()
256 value = mc_readl(mc, MC_EMEM_ARB_CFG); in tegra_mc_setup_latency_allowance()
266 value = mc_readl(mc, la->reg); in tegra_mc_setup_latency_allowance()
306 dram_count = mc_readl(mc, MC_EMEM_ADR_CFG); in tegra_mc_get_emem_device_count()
431 status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask; in tegra_mc_irq()
445 value = mc_readl(mc, MC_ERR_STATUS); in tegra_mc_irq()
507 value = mc_readl(mc, MC_ERR_ADR); in tegra_mc_irq()
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Dtegra20.c206 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_assert()
222 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_deassert()
238 value = mc_readl(mc, rst->control) & ~BIT(rst->bit); in tegra20_mc_block_dma()
249 return mc_readl(mc, rst->status) == 0; in tegra20_mc_dma_idling()
255 return (mc_readl(mc, rst->reset) & BIT(rst->bit)) == 0; in tegra20_mc_reset_status()
266 value = mc_readl(mc, rst->control) | BIT(rst->bit); in tegra20_mc_unblock_dma()
Dmc.h81 static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset) in mc_readl() function
Dtegra30-emc.c512 emc->mc_override = mc_readl(emc->mc, MC_EMEM_ARB_OVERRIDE); in emc_prepare_timing_change()
544 val = mc_readl(emc->mc, MC_EMEM_ARB_OUTSTANDING_REQ); in emc_prepare_timing_change()
746 mc_readl(emc->mc, MC_EMEM_ARB_OVERRIDE); in emc_prepare_timing_change()
Dtegra210-emc-core.c843 mc_readl(emc->mc, MC_EMEM_ADR_CFG); in tegra210_emc_do_clock_change()
1782 value = mc_readl(emc->mc, MC_EMEM_ADR_CFG); in tegra210_emc_detect()
Dtegra210-emc-cc-r21021.c1233 mc_readl(emc->mc, MC_EMEM_ADR_CFG); in tegra210_emc_r21021_set_clock()