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Searched refs:min_dcef_set_clk (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/
Ddm_pp_interface.h109 uint32_t min_dcef_set_clk; member
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c77 adev->pm.pm_display_cfg.min_dcef_set_clk = in dm_pp_apply_display_requirements()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu10_hwmgr.c193 clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk; in smu10_set_clock_limit()
Dvega12_hwmgr.c1600 min_clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk; in vega12_notify_smc_display_config_after_ps_adjustment()
Dvega20_hwmgr.c2347 min_clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk; in vega20_notify_smc_display_config_after_ps_adjustment()
Dvega10_hwmgr.c4053 min_clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk; in vega10_notify_smc_display_config_after_ps_adjustment()
/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dnavi10_ppt.c1580 min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; in navi10_notify_smc_display_config()
Dsienna_cichlid_ppt.c1411 min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; in sienna_cichlid_notify_smc_display_config()