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Searched refs:mlxsw_reg_write (Results 1 – 25 of 35) sorted by relevance

12

/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_nve_vxlan.c113 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mprs), mprs_pl); in __mlxsw_sp_nve_parsing_set()
201 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_set()
210 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_clear()
220 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp1_nve_vxlan_rtdp_set()
304 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnpc), tnpc_pl); in mlxsw_sp2_nve_vxlan_learning_set()
328 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_set()
346 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_clear()
360 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp2_nve_vxlan_rtdp_set()
Dspectrum_acl_ctcam.c23 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_ctcam_region_resize()
36 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(prcr), prcr_pl); in mlxsw_sp_acl_ctcam_region_move()
75 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_insert()
96 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_remove()
117 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_action_replace()
Dspectrum1_mr_tcam.c57 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_replace()
79 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_remove()
184 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_alloc()
195 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_free()
211 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_parman_resize()
226 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rrcr), rrcr_pl); in mlxsw_sp1_mr_tcam_region_parman_move()
Dswitchx2.c167 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(paos), paos_pl); in mlxsw_sx_port_admin_status_set()
205 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(pmtu), pmtu_pl); in __mlxsw_sx_port_mtu_set()
230 err = mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(plib), plib_pl); in mlxsw_sx_port_ib_port_set()
240 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sx_port_swid_set()
250 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(sspr), sspr_pl); in mlxsw_sx_port_system_port_mapping_set()
833 err = mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sx_port_set_link_ksettings()
916 err = mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(spms), spms_pl); in mlxsw_sx_port_stp_state_set()
929 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sx_port_ib_speed_set()
943 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sx_port_speed_by_width_set()
954 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(spmlr), spmlr_pl); in mlxsw_sx_port_mac_learning_mode_set()
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Dspectrum_ipip.c141 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp_ipip_nexthop_update_gre4()
180 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp_ipip_fib_entry_op_gre4_rtdp()
194 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralue), ralue_pl); in mlxsw_sp_ipip_fib_entry_op_gre4_ralue()
350 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tieem), tieem_pl); in mlxsw_sp_ipip_ecn_encap_init_one()
381 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tidem), tidem_pl); in mlxsw_sp_ipip_ecn_decap_init_one()
Dswitchib.c128 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(paos), paos_pl); in mlxsw_sib_port_admin_status_set()
149 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sib_port_mtu_set()
160 err = mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(plib), plib_pl); in mlxsw_sib_port_set()
171 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sib_port_swid_set()
198 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sib_port_speed_set()
445 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); in mlxsw_sib_basic_trap_groups_set()
Dspectrum.c198 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl); in mlxsw_sp_flow_counter_clear()
274 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); in mlxsw_sp_port_vid_stp_set()
300 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); in mlxsw_sp_port_admin_status_set()
311 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); in mlxsw_sp_port_dev_addr_set()
349 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sp_port_mtu_set()
358 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sp_port_swid_set()
367 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl); in mlxsw_sp_port_vp_mode_set()
382 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl); in mlxsw_sp_port_vid_learning_set()
394 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl); in __mlxsw_sp_port_pvid_set()
404 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl); in mlxsw_sp_port_allow_untagged_set()
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Dspectrum_dcb.c257 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpts), qpts_pl); in mlxsw_sp_port_dcb_app_update_qpts()
269 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qrwe), qrwe_pl); in mlxsw_sp_port_dcb_app_update_qrwe()
307 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdp), qpdp_pl); in mlxsw_sp_port_dcb_app_update_qpdp()
321 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdpm), qpdpm_pl); in mlxsw_sp_port_dcb_app_update_qpdpm()
335 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdsm), qpdsm_pl); in mlxsw_sp_port_dcb_app_update_qpdsm()
527 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), in mlxsw_sp_port_pfc_set()
Dspectrum_ptp.c111 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp1_ptp_phc_adjfreq()
141 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtpps), mtpps_pl); in mlxsw_sp1_ptp_phc_settime()
148 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp1_ptp_phc_settime()
699 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtptpt), mtptpt_pl); in mlxsw_sp_ptp_mtptpt_set()
714 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp1_ptp_set_fifo_clr_on_trap()
723 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtpppc), mtpppc_pl); in mlxsw_sp1_ptp_mtpppc_set()
803 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpsc), qpsc_pl); in mlxsw_sp1_ptp_shaper_params_set()
1003 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); in mlxsw_sp1_ptp_port_shaper_set()
Dspectrum_acl_bloom_filter.c196 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(peabfe), peabfe_pl); in mlxsw_sp_acl_bf_entry_add()
233 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(peabfe), peabfe_pl); in mlxsw_sp_acl_bf_entry_del()
Dspectrum_nve.c388 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnumt), tnumt_pl); in mlxsw_sp_nve_mc_record_refresh()
772 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); in mlxsw_sp_nve_fdb_flush_by_fid()
873 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqdr), tnqdr_pl); in mlxsw_sp_port_nve_init()
885 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqcr), tnqcr_pl); in mlxsw_sp_nve_qos_init()
899 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tneem), in mlxsw_sp_nve_ecn_encap_init()
919 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tndem), tndem_pl); in __mlxsw_sp_nve_ecn_decap_init()
Dspectrum_acl_erp.c193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_update()
401 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_add()
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_del()
436 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_enable()
454 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_disable()
660 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_add()
677 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_del()
1365 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_init()
1376 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_param_init()
Dspectrum_acl_flex_actions.c27 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp_act_kvdl_set_add()
98 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbs), ppbs_pl); in mlxsw_sp_act_kvdl_fwd_entry_add()
Dspectrum_span.c192 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_phys_configure()
206 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_deconfigure_common()
499 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_gretap4_configure()
602 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_gretap6_configure()
661 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); in mlxsw_sp_span_entry_vlan_configure()
1232 return mlxsw_reg_write(span->mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); in __mlxsw_sp_span_trigger_port_bind()
1367 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpagr), mpagr_pl); in mlxsw_sp2_span_trigger_global_bind()
1423 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(momte), momte_pl); in __mlxsw_sp2_span_trigger_global_enable()
1701 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp2_span_policer_id_base_set()
Dspectrum_acl_atcam.c287 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perar), perar_pl); in mlxsw_sp_acl_atcam_region_associate()
408 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_insert()
437 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_remove()
466 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_action_replace()
Dspectrum2_acl_tcam.c103 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp2_acl_tcam_init()
108 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pgcr), pgcr_pl); in mlxsw_sp2_acl_tcam_init()
Dcore.c929 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_lock()
942 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_component_update()
954 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl); in mlxsw_core_fw_fsm_block_download()
967 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_component_verify()
978 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_activate()
1012 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_cancel()
1023 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); in mlxsw_core_fw_fsm_release()
1792 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); in mlxsw_core_health_fw_fatal_test()
1813 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); in mlxsw_core_health_fw_fatal_config()
2323 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); in mlxsw_core_trap_register()
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Dcore_hwmon.c129 err = mlxsw_reg_write(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_hwmon_temp_rst_store()
215 err = mlxsw_reg_write(mlxsw_hwmon->core, MLXSW_REG(mfsc), mfsc_pl); in mlxsw_hwmon_pwm_store()
598 err = mlxsw_reg_write(mlxsw_hwmon->core, in mlxsw_hwmon_temp_init()
728 err = mlxsw_reg_write(mlxsw_hwmon->core, in mlxsw_hwmon_gearbox_init()
Dspectrum_router.c187 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); in mlxsw_sp_rif_counter_edit()
222 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ricnt), ricnt_pl); in mlxsw_sp_rif_counter_clear()
491 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralta), ralta_pl); in mlxsw_sp_lpm_tree_alloc()
502 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralta), ralta_pl); in mlxsw_sp_lpm_tree_free()
526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralst), ralst_pl); in mlxsw_sp_lpm_tree_left_struct_set()
692 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(raltb), raltb_pl); in mlxsw_sp_vr_lpm_tree_bind()
703 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(raltb), raltb_pl); in mlxsw_sp_vr_lpm_tree_unbind()
1453 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); in mlxsw_sp_rif_ipip_lb_op()
2447 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rauht), rauht_pl); in mlxsw_sp_router_neigh_entry_op4()
2464 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rauht), rauht_pl); in mlxsw_sp_router_neigh_entry_op6()
[all …]
Dspectrum_acl_tcam.c221 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pagt), pagt_pl); in mlxsw_sp_acl_tcam_group_update()
313 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbt), ppbt_pl); in mlxsw_sp_acl_tcam_group_bind()
328 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbt), ppbt_pl); in mlxsw_sp_acl_tcam_group_unbind()
585 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_tcam_region_alloc()
601 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_tcam_region_free()
612 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pacl), pacl_pl); in mlxsw_sp_acl_tcam_region_enable()
623 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pacl), pacl_pl); in mlxsw_sp_acl_tcam_region_disable()
Dspectrum_fid.c343 err = mlxsw_reg_write(fid_family->mlxsw_sp->core, MLXSW_REG(sftr), in mlxsw_sp_fid_flood_set()
423 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); in mlxsw_sp_fid_op()
438 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); in mlxsw_sp_fid_vni_op()
448 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl); in __mlxsw_sp_fid_port_vid_map()
1027 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfgc), sfgc_pl); in mlxsw_sp_fid_flood_table_init()
Dspectrum_buffers.c193 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl); in mlxsw_sp_sb_pr_write()
217 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbcm), sbcm_pl); in mlxsw_sp_sb_cm_write()
246 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl); in mlxsw_sp_sb_pm_write()
459 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); in mlxsw_sp_hdroom_configure_buffers()
483 err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb), pptb_pl); in mlxsw_sp_hdroom_configure_priomap()
503 err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); in mlxsw_sp_hdroom_configure_int_buf()
1126 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbmm), sbmm_pl); in mlxsw_sp_sb_mms_init()
Dcore_env.c375 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtmp), mtmp_pl); in mlxsw_env_temp_event_set()
574 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); in mlxsw_env_module_oper_state_event_enable()
Dspectrum_switchdev.c712 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdat), sfdat_pl); in mlxsw_sp_ageing_set()
855 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl); in mlxsw_sp_smid_router_port_set()
1272 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); in mlxsw_sp_bridge_port_fdb_flush()
1320 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl); in mlxsw_sp_port_fdb_tunnel_uc_op()
1348 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl); in __mlxsw_sp_port_fdb_uc_op()
1394 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl); in mlxsw_sp_port_fdb_uc_lag_op()
1458 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl); in mlxsw_sp_port_mdb_op()
1496 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl); in mlxsw_sp_port_smid_full_entry()
1513 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl); in mlxsw_sp_port_smid_set()
Dspectrum2_kvdl.c118 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(iedr), iedr_pl); in mlxsw_sp2_kvdl_rec_del()

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