Home
last modified time | relevance | path

Searched refs:mmBIF_BX_PF0_MAILBOX_MSGBUF_TRN_DW2 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dmxgpu_ai.c146 WREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_MSGBUF_TRN_DW2), in xgpu_ai_mailbox_trans_msg()
/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h2606 #define mmBIF_BX_PF0_MAILBOX_MSGBUF_TRN_DW2 macro