| /drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | vega20_baco.c | 36 {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_6), 0, 0, 0, 0},
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| D | vega12_baco.c | 82 { CMD_WRITE, NBIF_HWID, 0, mmBIOS_SCRATCH_6_BASE_IDX, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
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| D | vega10_baco.c | 84 {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_6), 0, 0, 0, 0},
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| D | fiji_baco.c | 149 { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
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| D | polaris_baco.c | 147 { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
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| D | ci_baco.c | 157 { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
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| D | tonga_baco.c | 151 { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
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| /drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_3_0_d.h | 616 #define mmBIOS_SCRATCH_6 0x05CF macro
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| D | bif_4_1_d.h | 150 #define mmBIOS_SCRATCH_6 0x5cf macro
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| D | bif_5_0_d.h | 161 #define mmBIOS_SCRATCH_6 0x5cf macro
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| D | bif_5_1_d.h | 169 #define mmBIOS_SCRATCH_6 0x5cf macro
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| /drivers/gpu/drm/amd/display/dc/dce100/ |
| D | dce100_resource.c | 82 #define mmBIOS_SCRATCH_6 0x05CF macro
371 .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
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| /drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_resource.c | 83 #define mmBIOS_SCRATCH_6 0x05CF macro
372 .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
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| /drivers/gpu/drm/amd/display/dc/dce60/ |
| D | dce60_resource.c | 82 #define mmBIOS_SCRATCH_6 0x05CF macro
367 .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
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| /drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_resource.c | 81 #define mmBIOS_SCRATCH_6 0x05CF macro
389 .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_resource.c | 89 #define mmBIOS_SCRATCH_6 0x05CF macro
383 .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
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| /drivers/gpu/drm/amd/include/asic_reg/nbif/ |
| D | nbif_6_1_offset.h | 597 #define mmBIOS_SCRATCH_6 … macro
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | atombios_encoders.c | 1859 bios_6_scratch = RREG32(mmBIOS_SCRATCH_6); in amdgpu_atombios_encoder_set_bios_scratch_regs()
1990 WREG32(mmBIOS_SCRATCH_6, bios_6_scratch); in amdgpu_atombios_encoder_set_bios_scratch_regs()
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| /drivers/gpu/drm/amd/display/dc/dce120/ |
| D | dce120_resource.c | 503 .BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6 + NBIO_BASE(mmBIOS_SCRATCH_6_BASE_IDX)
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| /drivers/gpu/drm/amd/include/asic_reg/nbio/ |
| D | nbio_6_1_offset.h | 2172 #define mmBIOS_SCRATCH_6 … macro
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| D | nbio_7_0_offset.h | 4056 #define mmBIOS_SCRATCH_6 … macro
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| D | nbio_7_4_offset.h | 2492 #define mmBIOS_SCRATCH_6 … macro
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| D | nbio_2_3_offset.h | 70 #define mmBIOS_SCRATCH_6 … macro
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