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Searched refs:mmBIOS_SCRATCH_7 (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dtonga_baco.c152 { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }
182 { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }
Dvega20_baco.c37 {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_7), 0, 0, 0, 0},
Dvega12_baco.c83 { CMD_WRITE, NBIF_HWID, 0, mmBIOS_SCRATCH_7_BASE_IDX, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }
Dvega10_baco.c85 {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_7), 0, 0, 0, 0},
Dfiji_baco.c150 { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 },
Dpolaris_baco.c148 { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }
Dci_baco.c158 { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 },
/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_3_0_d.h617 #define mmBIOS_SCRATCH_7 0x05D0 macro
Dbif_4_1_d.h151 #define mmBIOS_SCRATCH_7 0x5d0 macro
Dbif_5_0_d.h162 #define mmBIOS_SCRATCH_7 0x5d0 macro
Dbif_5_1_d.h170 #define mmBIOS_SCRATCH_7 0x5d0 macro
/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_offset.h599 #define mmBIOS_SCRATCH_7 macro
/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h2174 #define mmBIOS_SCRATCH_7 macro
Dnbio_7_0_offset.h4058 #define mmBIOS_SCRATCH_7 macro
Dnbio_7_4_offset.h2494 #define mmBIOS_SCRATCH_7 macro
Dnbio_2_3_offset.h72 #define mmBIOS_SCRATCH_7 macro