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Searched refs:mmCGTT_VGT_CLK_CTRL (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dmxgpu_vi.c72 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
163 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
Dsi.c446 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
575 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
673 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
773 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
853 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
Dgfx_v8_0.c254 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
457 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
528 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
624 mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100,
Dgfx_v10_0.c181 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xffff8fff, 0xffff8100),
1287 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xffff8fff, 0xffff8100),
1329 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xffff8fff, 0xffff8100),
7354 WREG32_SOC15(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xff000000); in gfx_v10_0_update_medium_grain_clock_gating()
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h319 #define mmCGTT_VGT_CLK_CTRL 0x225F macro
Dgfx_7_0_d.h2401 #define mmCGTT_VGT_CLK_CTRL 0xf084 macro
Dgfx_7_2_d.h2426 #define mmCGTT_VGT_CLK_CTRL 0xf084 macro
Dgfx_8_1_d.h2644 #define mmCGTT_VGT_CLK_CTRL 0xf084 macro
Dgfx_8_0_d.h2666 #define mmCGTT_VGT_CLK_CTRL 0xf084 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6511 #define mmCGTT_VGT_CLK_CTRL … macro
Dgc_9_1_offset.h6733 #define mmCGTT_VGT_CLK_CTRL … macro
Dgc_9_2_1_offset.h6751 #define mmCGTT_VGT_CLK_CTRL … macro
Dgc_10_1_0_offset.h10107 #define mmCGTT_VGT_CLK_CTRL … macro