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Searched refs:mmCP_DFY_ADDR_LO (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dsmu7_smumgr.c514 cgs_write_register(hwmgr->device, mmCP_DFY_ADDR_LO, section->dfy_addr_lo); in execute_pwr_dfy_table()
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h178 #define mmCP_DFY_ADDR_LO 0x3023 macro
Dgfx_7_2_d.h178 #define mmCP_DFY_ADDR_LO 0x3023 macro
Dgfx_8_1_d.h200 #define mmCP_DFY_ADDR_LO 0x3023 macro
Dgfx_8_0_d.h200 #define mmCP_DFY_ADDR_LO 0x3023 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2304 #define mmCP_DFY_ADDR_LO … macro
Dgc_9_1_offset.h2581 #define mmCP_DFY_ADDR_LO … macro
Dgc_9_2_1_offset.h2519 #define mmCP_DFY_ADDR_LO … macro