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Searched refs:mmCP_MES_IC_BASE_HI (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dmes_v10_1.c482 WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_HI, in mes_v10_1_load_microcode()
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h10271 #define mmCP_MES_IC_BASE_HI … macro
Dgc_10_3_0_offset.h9881 #define mmCP_MES_IC_BASE_HI … macro