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Searched refs:mmCP_SEM_INCOMPLETE_TIMER_CNTL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h543 #define mmCP_SEM_INCOMPLETE_TIMER_CNTL 0x2172 macro
Dgfx_7_0_d.h446 #define mmCP_SEM_INCOMPLETE_TIMER_CNTL 0xc072 macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2094 WREG32(mmCP_SEM_INCOMPLETE_TIMER_CNTL, 0x0); in gfx_v6_0_cp_gfx_resume()
Dgfx_v7_0.c2605 WREG32(mmCP_SEM_INCOMPLETE_TIMER_CNTL, 0x0); in gfx_v7_0_cp_gfx_resume()