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Searched refs:mmDCP0_REGAMMA_LUT_WRITE_EN_MASK (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1635 #define mmDCP0_REGAMMA_LUT_WRITE_EN_MASK 0x1AA3 macro
Ddce_8_0_d.h2621 #define mmDCP0_REGAMMA_LUT_WRITE_EN_MASK 0x1aa3 macro
Ddce_11_0_d.h3161 #define mmDCP0_REGAMMA_LUT_WRITE_EN_MASK 0x1aa3 macro
Ddce_10_0_d.h3400 #define mmDCP0_REGAMMA_LUT_WRITE_EN_MASK 0x1aa3 macro
Ddce_11_2_d.h4392 #define mmDCP0_REGAMMA_LUT_WRITE_EN_MASK 0x1aa3 macro
Ddce_12_0_offset.h3770 #define mmDCP0_REGAMMA_LUT_WRITE_EN_MASK macro