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Searched refs:mmGB_EDC_MODE (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h656 #define mmGB_EDC_MODE 0x307E macro
Dgfx_7_0_d.h740 #define mmGB_EDC_MODE 0x307e macro
Dgfx_7_2_d.h753 #define mmGB_EDC_MODE 0x307e macro
Dgfx_8_1_d.h825 #define mmGB_EDC_MODE 0x307e macro
Dgfx_8_0_d.h825 #define mmGB_EDC_MODE 0x307e macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v8_0.c1538 tmp = RREG32(mmGB_EDC_MODE); in gfx_v8_0_do_edc_gpr_workarounds()
1539 WREG32(mmGB_EDC_MODE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1666 WREG32(mmGB_EDC_MODE, tmp); in gfx_v8_0_do_edc_gpr_workarounds()
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2492 #define mmGB_EDC_MODE macro
Dgc_9_1_offset.h2769 #define mmGB_EDC_MODE macro
Dgc_10_1_0_offset.h4831 #define mmGB_EDC_MODE macro
Dgc_10_3_0_offset.h4486 #define mmGB_EDC_MODE macro