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Searched refs:mmMC_CITF_MISC_WR_CG (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgmc_v8_0.c1540 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_medium_grain_clock_gating()
1542 WREG32(mmMC_CITF_MISC_WR_CG, data); in fiji_update_mc_medium_grain_clock_gating()
1576 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_medium_grain_clock_gating()
1578 WREG32(mmMC_CITF_MISC_WR_CG, data); in fiji_update_mc_medium_grain_clock_gating()
1620 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_light_sleep()
1622 WREG32(mmMC_CITF_MISC_WR_CG, data); in fiji_update_mc_light_sleep()
1656 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_light_sleep()
1658 WREG32(mmMC_CITF_MISC_WR_CG, data); in fiji_update_mc_light_sleep()
Dsi.c543 mmMC_CITF_MISC_WR_CG, 0x000c0000, 0x000c0000,
740 mmMC_CITF_MISC_WR_CG, 0x000c0000, 0x000c0000,
820 mmMC_CITF_MISC_WR_CG, 0x000c0000, 0x000c0000,
899 mmMC_CITF_MISC_WR_CG, 0x000c0000, 0x000c0000,
Dgmc_v7_0.c796 mmMC_CITF_MISC_WR_CG,
/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_d.h123 #define mmMC_CITF_MISC_WR_CG 0x993 macro
Dgmc_8_2_d.h129 #define mmMC_CITF_MISC_WR_CG 0x993 macro
Dgmc_6_0_d.h708 #define mmMC_CITF_MISC_WR_CG 0x0993 macro
Dgmc_7_1_d.h124 #define mmMC_CITF_MISC_WR_CG 0x993 macro
Dgmc_8_1_d.h129 #define mmMC_CITF_MISC_WR_CG 0x993 macro