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Searched refs:mmMC_SEQ_PMG_CMD_MRS_LP (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h920 #define mmMC_SEQ_PMG_CMD_MRS_LP 0x0AA2 macro
Dgmc_7_1_d.h822 #define mmMC_SEQ_PMG_CMD_MRS_LP 0xaa2 macro
Dgmc_8_1_d.h926 #define mmMC_SEQ_PMG_CMD_MRS_LP 0xaa2 macro
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c2440 *out_reg = mmMC_SEQ_PMG_CMD_MRS_LP; in iceland_check_s0_mc_reg_index()
2537 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in iceland_set_mc_special_registers()
2627 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_P… in iceland_initialize_mc_reg_table()
Dtonga_smumgr.c2903 *out_reg = mmMC_SEQ_PMG_CMD_MRS_LP; in tonga_check_s0_mc_reg_index()
3003 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in tonga_set_mc_special_registers()
3103 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, in tonga_initialize_mc_reg_table()
Dci_smumgr.c2512 *out_reg = mmMC_SEQ_PMG_CMD_MRS_LP; in ci_check_s0_mc_reg_index()
2609 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in ci_set_mc_special_registers()
2699 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_P… in ci_initialize_mc_reg_table()