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Searched refs:mmMC_TRAIN_EDC_STATUS_D1 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h1013 #define mmMC_TRAIN_EDC_STATUS_D1 0x0A48 macro
Dgmc_7_1_d.h677 #define mmMC_TRAIN_EDC_STATUS_D1 0xa48 macro
Dgmc_8_1_d.h781 #define mmMC_TRAIN_EDC_STATUS_D1 0xa48 macro