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Searched refs:mmPA_CL_UCP_0_Z (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h815 #define mmPA_CL_UCP_0_Z 0xA171 macro
Dgfx_7_0_d.h926 #define mmPA_CL_UCP_0_Z 0xa171 macro
Dgfx_7_2_d.h939 #define mmPA_CL_UCP_0_Z 0xa171 macro
Dgfx_8_1_d.h1021 #define mmPA_CL_UCP_0_Z 0xa171 macro
Dgfx_8_0_d.h1021 #define mmPA_CL_UCP_0_Z 0xa171 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h3817 #define mmPA_CL_UCP_0_Z … macro
Dgc_9_1_offset.h4047 #define mmPA_CL_UCP_0_Z … macro
Dgc_9_2_1_offset.h3997 #define mmPA_CL_UCP_0_Z … macro
Dgc_10_1_0_offset.h6197 #define mmPA_CL_UCP_0_Z … macro
Dgc_10_3_0_offset.h5824 #define mmPA_CL_UCP_0_Z … macro