Searched refs:mmPA_SC_RASTER_CONFIG_1 (Results 1 – 14 of 14) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | mxgpu_vi.c | 127 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002e,
270 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002A,
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| D | gfx_v8_0.c | 220 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002A,
316 mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x0000002e,
347 mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x00000000,
379 mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x0000002a,
394 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002A,
406 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002e,
479 mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x00000000,
494 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x00000000,
590 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x00000000,
695 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x00000000,
[all …]
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| D | cik.c | 1042 {mmPA_SC_RASTER_CONFIG_1, true},
1062 case mmPA_SC_RASTER_CONFIG_1: in cik_get_register_value()
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| D | vi.c | 534 {mmPA_SC_RASTER_CONFIG_1, true},
553 case mmPA_SC_RASTER_CONFIG_1: in vi_get_register_value()
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| D | gfx_v7_0.c | 1771 WREG32(mmPA_SC_RASTER_CONFIG_1, raster_config_1); in gfx_v7_0_write_harvested_raster_configs()
1819 WREG32(mmPA_SC_RASTER_CONFIG_1, raster_config_1); in gfx_v7_0_setup_rb()
1837 RREG32(mmPA_SC_RASTER_CONFIG_1); in gfx_v7_0_setup_rb()
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| /drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_0_d.h | 1020 #define mmPA_SC_RASTER_CONFIG_1 0xa0d5 macro
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| D | gfx_7_2_d.h | 1033 #define mmPA_SC_RASTER_CONFIG_1 0xa0d5 macro
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| D | gfx_8_1_d.h | 1116 #define mmPA_SC_RASTER_CONFIG_1 0xa0d5 macro
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| D | gfx_8_0_d.h | 1115 #define mmPA_SC_RASTER_CONFIG_1 0xa0d5 macro
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| /drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 3583 #define mmPA_SC_RASTER_CONFIG_1 … macro
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| D | gc_9_1_offset.h | 3813 #define mmPA_SC_RASTER_CONFIG_1 … macro
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| D | gc_9_2_1_offset.h | 3763 #define mmPA_SC_RASTER_CONFIG_1 … macro
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| D | gc_10_1_0_offset.h | 5953 #define mmPA_SC_RASTER_CONFIG_1 … macro
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| D | gc_10_3_0_offset.h | 5582 #define mmPA_SC_RASTER_CONFIG_1 … macro
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