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Searched refs:mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_offset.h765 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 macro
/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h2298 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 macro
Dnbio_7_0_offset.h4180 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 macro
Dnbio_7_4_offset.h2618 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 macro
Dnbio_2_3_offset.h270 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_1 macro