Home
last modified time | relevance | path

Searched refs:mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_offset.h773 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 … macro
/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h2306 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 … macro
Dnbio_7_0_offset.h4188 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 … macro
Dnbio_7_4_offset.h2626 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 … macro
Dnbio_2_3_offset.h278 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5 … macro