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Searched refs:mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_5 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h2284 #define mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_5 … macro
Dnbio_7_0_offset.h4166 #define mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_5 … macro
Dnbio_7_4_offset.h2604 #define mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_5 … macro
Dnbio_2_3_offset.h252 #define mmPCIE_F1_DPA_SUBSTATE_PWR_ALLOC_5 … macro