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Searched refs:mmRLC_GPM_UTCL1_CNTL_2 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c549 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_2, 0x08000000, 0x08000080),
587 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_2, 0x08000000, 0x08000080),
626 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_2, 0xff0fffff, 0x08000080),
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6223 #define mmRLC_GPM_UTCL1_CNTL_2 macro
Dgc_9_1_offset.h6445 #define mmRLC_GPM_UTCL1_CNTL_2 macro
Dgc_9_2_1_offset.h6421 #define mmRLC_GPM_UTCL1_CNTL_2 macro
Dgc_10_1_0_offset.h9531 #define mmRLC_GPM_UTCL1_CNTL_2 macro
Dgc_10_3_0_offset.h9369 #define mmRLC_GPM_UTCL1_CNTL_2 macro