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Searched refs:mmRLC_UTCL1_STATUS_2 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6227 #define mmRLC_UTCL1_STATUS_2 … macro
Dgc_9_1_offset.h6449 #define mmRLC_UTCL1_STATUS_2 … macro
Dgc_9_2_1_offset.h6425 #define mmRLC_UTCL1_STATUS_2 … macro
Dgc_10_1_0_offset.h9535 #define mmRLC_UTCL1_STATUS_2 … macro
Dgc_10_3_0_offset.h9373 #define mmRLC_UTCL1_STATUS_2 … macro