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Searched refs:mmSDMA1_POWER_CNTL (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h272 #define mmSDMA1_POWER_CNTL 0x3602 macro
Doss_3_0_1_d.h331 #define mmSDMA1_POWER_CNTL 0x3602 macro
Doss_2_0_d.h316 #define mmSDMA1_POWER_CNTL 0x3602 macro
Doss_3_0_d.h447 #define mmSDMA1_POWER_CNTL 0x3602 macro
/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_offset.h66 #define mmSDMA1_POWER_CNTL 0x001a macro
Dsdma1_4_2_offset.h66 #define mmSDMA1_POWER_CNTL macro
Dsdma1_4_2_2_offset.h66 #define mmSDMA1_POWER_CNTL macro
/drivers/gpu/drm/amd/amdgpu/
Dsdma_v3_0.c157 mmSDMA1_POWER_CNTL, 0x00000800, 0x0003c800,
Dsdma_v4_0.c107 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_POWER_CNTL, 0x003ff000, 0x0003c000),
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h1048 #define mmSDMA1_POWER_CNTL macro
Dgc_10_3_0_offset.h1088 #define mmSDMA1_POWER_CNTL macro