Searched refs:mmSDMA1_RLC0_IB_CNTL (Results 1 – 12 of 12) sorted by relevance
/drivers/gpu/drm/amd/amdgpu/ |
D | mxgpu_vi.c | 111 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100, 251 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
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D | sdma_v3_0.c | 90 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100, 108 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100, 128 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100, 142 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100, 158 mmSDMA1_RLC0_IB_CNTL, 0x00000100, 0x00000100,
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D | sdma_v4_0.c | 108 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_IB_CNTL, 0x800f0100, 0x00000100),
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/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_2_4_d.h | 333 #define mmSDMA1_RLC0_IB_CNTL 0x370a macro
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D | oss_3_0_1_d.h | 434 #define mmSDMA1_RLC0_IB_CNTL 0x370a macro
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D | oss_2_0_d.h | 369 #define mmSDMA1_RLC0_IB_CNTL 0x370a macro
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D | oss_3_0_d.h | 535 #define mmSDMA1_RLC0_IB_CNTL 0x370a macro
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/drivers/gpu/drm/amd/include/asic_reg/sdma1/ |
D | sdma1_4_0_offset.h | 390 #define mmSDMA1_RLC0_IB_CNTL 0x014a macro
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D | sdma1_4_2_offset.h | 386 #define mmSDMA1_RLC0_IB_CNTL … macro
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D | sdma1_4_2_2_offset.h | 390 #define mmSDMA1_RLC0_IB_CNTL … macro
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/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_10_1_0_offset.h | 1389 #define mmSDMA1_RLC0_IB_CNTL … macro
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D | gc_10_3_0_offset.h | 1428 #define mmSDMA1_RLC0_IB_CNTL … macro
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