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Searched refs:mmSPI_PS_INPUT_CNTL_2 (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1233 #define mmSPI_PS_INPUT_CNTL_2 0xA193 macro
Dgfx_7_0_d.h1363 #define mmSPI_PS_INPUT_CNTL_2 0xa193 macro
Dgfx_7_2_d.h1380 #define mmSPI_PS_INPUT_CNTL_2 0xa193 macro
Dgfx_8_1_d.h1527 #define mmSPI_PS_INPUT_CNTL_2 0xa193 macro
Dgfx_8_0_d.h1559 #define mmSPI_PS_INPUT_CNTL_2 0xa193 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h3865 #define mmSPI_PS_INPUT_CNTL_2 … macro
Dgc_9_1_offset.h4095 #define mmSPI_PS_INPUT_CNTL_2 … macro
Dgc_9_2_1_offset.h4047 #define mmSPI_PS_INPUT_CNTL_2 … macro
Dgc_10_1_0_offset.h6247 #define mmSPI_PS_INPUT_CNTL_2 … macro
Dgc_10_3_0_offset.h5874 #define mmSPI_PS_INPUT_CNTL_2 … macro