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Searched refs:mmTCI_EDC_CNT (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_offset.h184 #define mmTCI_EDC_CNT macro
Dgc_9_0_offset.h1744 #define mmTCI_EDC_CNT macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4.c77 { SOC15_REG_ENTRY(GC, 0, mmTCI_EDC_CNT), 0, 1, 72 },
392 { "TCI_WRITE_RAM", SOC15_REG_ENTRY(GC, 0, mmTCI_EDC_CNT),
Dgfx_v9_0.c4455 { SOC15_REG_ENTRY(GC, 0, mmTCI_EDC_CNT), 0, 1, 72},
6096 { "TCI_WRITE_RAM", SOC15_REG_ENTRY(GC, 0, mmTCI_EDC_CNT),