Searched refs:mmUVD_DPG_LMA_CTL (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_vcn.h | 72 WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_CTL, \
84 WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_CTL, \
126 WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_LMA_CTL, \
137 WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_LMA_CTL, \
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| /drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| D | vcn_1_0_offset.h | 36 #define mmUVD_DPG_LMA_CTL … macro
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| D | vcn_2_5_offset.h | 409 #define mmUVD_DPG_LMA_CTL … macro
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| D | vcn_2_0_0_offset.h | 394 #define mmUVD_DPG_LMA_CTL … macro
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| D | vcn_3_0_0_offset.h | 685 #define mmUVD_DPG_LMA_CTL … macro
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