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Searched refs:mmUVD_LMI_JRBC_RB_VMID (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h260 #define mmUVD_LMI_JRBC_RB_VMID macro
Dvcn_2_5_offset.h233 #define mmUVD_LMI_JRBC_RB_VMID macro
Dvcn_2_0_0_offset.h218 #define mmUVD_LMI_JRBC_RB_VMID macro
Dvcn_3_0_0_offset.h449 #define mmUVD_LMI_JRBC_RB_VMID macro
/drivers/gpu/drm/amd/amdgpu/
Djpeg_v3_0.c352 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_VMID, 0); in jpeg_v3_0_start()
Djpeg_v2_5.c329 WREG32_SOC15(JPEG, i, mmUVD_LMI_JRBC_RB_VMID, 0); in jpeg_v2_5_start()
Djpeg_v1_0.c522 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_VMID, 0); in jpeg_v1_0_start()
Djpeg_v2_0.c359 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_VMID, 0); in jpeg_v2_0_start()
Dvcn_v1_0.c1307 WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_VMID, 0); in vcn_v1_0_pause_dpg_mode()