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Searched refs:mmVCE_LMI_SWAP_CNTL (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_1_0_d.h33 #define mmVCE_LMI_SWAP_CNTL 0x83AD macro
Dvce_2_0_d.h62 #define mmVCE_LMI_SWAP_CNTL 0x852d macro
Dvce_3_0_d.h67 #define mmVCE_LMI_SWAP_CNTL 0x85ad macro
Dvce_4_0_offset.h138 #define mmVCE_LMI_SWAP_CNTL macro
/drivers/gpu/drm/amd/amdgpu/
Dvce_v4_0.c243 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_SWAP_CNTL), 0); in vce_v4_0_sriov_start()
611 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_SWAP_CNTL), 0); in vce_v4_0_mc_resume()
Dvce_v2_0.c179 WREG32(mmVCE_LMI_SWAP_CNTL, 0); in vce_v2_0_mc_resume()
Dvce_v3_0.c536 WREG32(mmVCE_LMI_SWAP_CNTL, 0); in vce_v3_0_mc_resume()