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Searched refs:mmVCE_LMI_VCPU_CACHE_40BIT_BAR (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_1_0_d.h35 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR 0x8397 macro
Dvce_2_0_d.h56 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR 0x8517 macro
Dvce_3_0_d.h61 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR 0x8597 macro
Dvce_4_0_offset.h126 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR … macro
/drivers/gpu/drm/amd/amdgpu/
Dvce_v2_0.c183 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); in vce_v2_0_mc_resume()
Dvce_v3_0.c546 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()