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Searched refs:mux_val (Results 1 – 7 of 7) sorted by relevance

/drivers/clk/mmp/
Dclk-mix.c134 static int _set_rate(struct mmp_clk_mix *mix, u32 mux_val, u32 div_val, in _set_rate() argument
166 mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift); in _set_rate()
280 u32 div_val, mux_val; in mmp_clk_mix_set_rate_and_parent() local
284 mux_val = _get_mux_val(mix, index); in mmp_clk_mix_set_rate_and_parent()
286 return _set_rate(mix, mux_val, div_val, 1, 1); in mmp_clk_mix_set_rate_and_parent()
296 u32 mux_val; in mmp_clk_mix_get_parent() local
313 mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift); in mmp_clk_mix_get_parent()
315 return _get_mux(mix, mux_val); in mmp_clk_mix_get_parent()
353 u32 div_val, mux_val; in mmp_clk_set_parent() local
365 mux_val = _get_mux_val(mix, item->parent_index); in mmp_clk_set_parent()
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/drivers/dma/ti/
Ddma-crossbar.c48 u8 mux_val; member
70 map->mux_val, map->dma_line); in ti_am335x_xbar_free()
112 map->mux_val = (u8)dma_spec->args[2]; in ti_am335x_xbar_route_allocate()
118 map->mux_val, map->dma_line); in ti_am335x_xbar_route_allocate()
120 ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val); in ti_am335x_xbar_route_allocate()
/drivers/gpio/
Dgpio-sodaville.c185 u32 mux_val; in sdv_gpio_probe() local
205 ret = of_property_read_u32(pdev->dev.of_node, "intel,muxctl", &mux_val); in sdv_gpio_probe()
207 writel(mux_val, sd->gpio_pub_base + GPMUXCTL); in sdv_gpio_probe()
/drivers/clk/x86/
Dclk-cgu.h180 unsigned int mux_val; member
216 .mux_val = _v, \
Dclk-cgu.c117 lgm_set_clk_val(mux->membase, reg, shift, width, list->mux_val); in lgm_clk_register_mux()
/drivers/pinctrl/
Dpinctrl-zynq.c70 unsigned int mux_val; member
760 .mux_val = mval, \
768 .mux_val = mval, \
927 reg |= func->mux_val << ZYNQ_PINMUX_MUX_SHIFT; in zynq_pinmux_set_mux()
Dpinctrl-bm1880.c67 u32 mux_val; member
653 .mux_val = mval, \
998 regval |= func->mux_val << mux_offset; in bm1880_pinmux_set_mux()