| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_encoders.c | 168 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_panel_mode_fixup() local
169 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in amdgpu_panel_mode_fixup()
170 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; in amdgpu_panel_mode_fixup()
171 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in amdgpu_panel_mode_fixup()
172 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; in amdgpu_panel_mode_fixup()
173 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; in amdgpu_panel_mode_fixup()
174 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in amdgpu_panel_mode_fixup()
176 adjusted_mode->clock = native_mode->clock; in amdgpu_panel_mode_fixup()
177 adjusted_mode->flags = native_mode->flags; in amdgpu_panel_mode_fixup()
179 adjusted_mode->hdisplay = native_mode->hdisplay; in amdgpu_panel_mode_fixup()
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| D | amdgpu_connectors.c | 374 amdgpu_encoder->native_mode = *preferred_mode; in amdgpu_get_native_mode()
376 amdgpu_encoder->native_mode.clock = 0; in amdgpu_get_native_mode()
386 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_lcd_native_mode() local
388 if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode()
389 native_mode->vdisplay != 0 && in amdgpu_connector_lcd_native_mode()
390 native_mode->clock != 0) { in amdgpu_connector_lcd_native_mode()
391 mode = drm_mode_duplicate(dev, native_mode); in amdgpu_connector_lcd_native_mode()
399 } else if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode()
400 native_mode->vdisplay != 0) { in amdgpu_connector_lcd_native_mode()
408 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in amdgpu_connector_lcd_native_mode()
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| D | atombios_encoders.c | 2021 lvds->native_mode.clock = in amdgpu_atombios_encoder_get_lcd_info()
2023 lvds->native_mode.hdisplay = in amdgpu_atombios_encoder_get_lcd_info()
2025 lvds->native_mode.vdisplay = in amdgpu_atombios_encoder_get_lcd_info()
2027 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()
2029 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()
2031 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in amdgpu_atombios_encoder_get_lcd_info()
2033 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()
2035 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()
2037 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in amdgpu_atombios_encoder_get_lcd_info()
2045 lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; in amdgpu_atombios_encoder_get_lcd_info()
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| D | amdgpu_display.c | 718 else if (mode->hdisplay < amdgpu_encoder->native_mode.hdisplay || in amdgpu_display_crtc_scaling_mode_fixup()
719 mode->vdisplay < amdgpu_encoder->native_mode.vdisplay) in amdgpu_display_crtc_scaling_mode_fixup()
724 memcpy(&amdgpu_crtc->native_mode, in amdgpu_display_crtc_scaling_mode_fixup()
725 &amdgpu_encoder->native_mode, in amdgpu_display_crtc_scaling_mode_fixup()
728 dst_v = amdgpu_crtc->native_mode.vdisplay; in amdgpu_display_crtc_scaling_mode_fixup()
730 dst_h = amdgpu_crtc->native_mode.hdisplay; in amdgpu_display_crtc_scaling_mode_fixup()
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| D | amdgpu_mode.h | 402 struct drm_display_mode native_mode; member
444 struct drm_display_mode native_mode; member
464 struct drm_display_mode native_mode; member
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| /drivers/gpu/drm/radeon/ |
| D | radeon_encoders.c | 329 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; in radeon_panel_mode_fixup() local
330 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in radeon_panel_mode_fixup()
331 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; in radeon_panel_mode_fixup()
332 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in radeon_panel_mode_fixup()
333 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; in radeon_panel_mode_fixup()
334 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; in radeon_panel_mode_fixup()
335 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in radeon_panel_mode_fixup()
337 adjusted_mode->clock = native_mode->clock; in radeon_panel_mode_fixup()
338 adjusted_mode->flags = native_mode->flags; in radeon_panel_mode_fixup()
341 adjusted_mode->hdisplay = native_mode->hdisplay; in radeon_panel_mode_fixup()
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| D | radeon_connectors.c | 404 radeon_encoder->native_mode = *preferred_mode; in radeon_get_native_mode()
406 radeon_encoder->native_mode.clock = 0; in radeon_get_native_mode()
470 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; in radeon_fp_native_mode() local
472 if (native_mode->hdisplay != 0 && in radeon_fp_native_mode()
473 native_mode->vdisplay != 0 && in radeon_fp_native_mode()
474 native_mode->clock != 0) { in radeon_fp_native_mode()
475 mode = drm_mode_duplicate(dev, native_mode); in radeon_fp_native_mode()
482 } else if (native_mode->hdisplay != 0 && in radeon_fp_native_mode()
483 native_mode->vdisplay != 0) { in radeon_fp_native_mode()
491 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in radeon_fp_native_mode()
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| D | radeon_legacy_crtc.c | 66 struct drm_display_mode *native_mode = &radeon_crtc->native_mode; in radeon_legacy_rmx_mode_set() local
113 if (native_mode->hdisplay == 0 || in radeon_legacy_rmx_mode_set()
114 native_mode->vdisplay == 0) { in radeon_legacy_rmx_mode_set()
118 if (xres > native_mode->hdisplay) in radeon_legacy_rmx_mode_set()
119 xres = native_mode->hdisplay; in radeon_legacy_rmx_mode_set()
120 if (yres > native_mode->vdisplay) in radeon_legacy_rmx_mode_set()
121 yres = native_mode->vdisplay; in radeon_legacy_rmx_mode_set()
123 if (xres == native_mode->hdisplay) in radeon_legacy_rmx_mode_set()
125 if (yres == native_mode->vdisplay) in radeon_legacy_rmx_mode_set()
137 / native_mode->hdisplay + 1; in radeon_legacy_rmx_mode_set()
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| D | radeon_combios.c | 1129 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()
1133 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()
1137 lvds->native_mode.hdisplay = in radeon_legacy_get_lvds_info_from_regs()
1141 lvds->native_mode.hdisplay = in radeon_legacy_get_lvds_info_from_regs()
1144 if ((lvds->native_mode.hdisplay < 640) || in radeon_legacy_get_lvds_info_from_regs()
1145 (lvds->native_mode.vdisplay < 480)) { in radeon_legacy_get_lvds_info_from_regs()
1146 lvds->native_mode.hdisplay = 640; in radeon_legacy_get_lvds_info_from_regs()
1147 lvds->native_mode.vdisplay = 480; in radeon_legacy_get_lvds_info_from_regs()
1167 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, in radeon_legacy_get_lvds_info_from_regs()
1168 lvds->native_mode.vdisplay); in radeon_legacy_get_lvds_info_from_regs()
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| D | radeon_atombios.c | 1643 lvds->native_mode.clock = in radeon_atombios_get_lvds_info()
1645 lvds->native_mode.hdisplay = in radeon_atombios_get_lvds_info()
1647 lvds->native_mode.vdisplay = in radeon_atombios_get_lvds_info()
1649 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()
1651 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()
1653 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in radeon_atombios_get_lvds_info()
1655 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()
1657 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()
1659 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in radeon_atombios_get_lvds_info()
1667 lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; in radeon_atombios_get_lvds_info()
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| D | radeon_mode.h | 350 struct drm_display_mode native_mode; member
392 struct drm_display_mode native_mode; member
436 struct drm_display_mode native_mode; member
473 struct drm_display_mode native_mode; member
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| D | radeon_display.c | 1718 else if (mode->hdisplay < radeon_encoder->native_mode.hdisplay || in radeon_crtc_scaling_mode_fixup()
1719 mode->vdisplay < radeon_encoder->native_mode.vdisplay) in radeon_crtc_scaling_mode_fixup()
1724 memcpy(&radeon_crtc->native_mode, in radeon_crtc_scaling_mode_fixup()
1725 &radeon_encoder->native_mode, in radeon_crtc_scaling_mode_fixup()
1728 dst_v = radeon_crtc->native_mode.vdisplay; in radeon_crtc_scaling_mode_fixup()
1730 dst_h = radeon_crtc->native_mode.hdisplay; in radeon_crtc_scaling_mode_fixup()
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| /drivers/video/ |
| D | of_display_timing.c | 147 struct device_node *native_mode; in of_get_display_timings() local
177 native_mode = entry; in of_get_display_timings()
195 disp->native_mode = 0; in of_get_display_timings()
220 if (native_mode == entry) in of_get_display_timings()
221 disp->native_mode = disp->num_timings; in of_get_display_timings()
231 of_node_put(native_mode); in of_get_display_timings()
235 disp->native_mode + 1); in of_get_display_timings()
240 of_node_put(native_mode); in of_get_display_timings()
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| D | of_videomode.c | 43 index = disp->native_mode; in of_get_videomode()
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| /drivers/gpu/drm/nouveau/ |
| D | nouveau_connector.c | 824 struct drm_display_mode *native = nv_connector->native_mode, *m; in nouveau_connector_scaler_modes_add()
860 struct drm_display_mode *mode = nv_connector->native_mode; in nouveau_connector_detect_depth()
930 if (nv_connector->native_mode) { in nouveau_connector_get_modes()
931 drm_mode_destroy(dev, nv_connector->native_mode); in nouveau_connector_get_modes()
932 nv_connector->native_mode = NULL; in nouveau_connector_get_modes()
944 nv_connector->native_mode = drm_mode_duplicate(dev, &mode); in nouveau_connector_get_modes()
957 if (!nv_connector->native_mode) in nouveau_connector_get_modes()
958 nv_connector->native_mode = nouveau_conn_native_mode(connector); in nouveau_connector_get_modes()
959 if (ret == 0 && nv_connector->native_mode) { in nouveau_connector_get_modes()
962 mode = drm_mode_duplicate(dev, nv_connector->native_mode); in nouveau_connector_get_modes()
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| D | nouveau_connector.h | 128 struct drm_display_mode *native_mode; member
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| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | dfp.c | 190 if (!nv_connector->native_mode || in nv04_dfp_mode_fixup()
192 mode->hdisplay > nv_connector->native_mode->hdisplay || in nv04_dfp_mode_fixup()
193 mode->vdisplay > nv_connector->native_mode->vdisplay) { in nv04_dfp_mode_fixup()
197 nv_encoder->mode = *nv_connector->native_mode; in nv04_dfp_mode_fixup()
198 adjusted_mode->clock = nv_connector->native_mode->clock; in nv04_dfp_mode_fixup()
597 if (connector && connector->native_mode) in nv04_dfp_restore()
600 connector->native_mode->clock); in nv04_dfp_restore()
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| /drivers/gpu/drm/nouveau/dispnv50/ |
| D | disp.c | 356 struct drm_display_mode *native_mode) in nv50_outp_atomic_check_view() argument
366 if (!native_mode) in nv50_outp_atomic_check_view()
377 if (mode->hdisplay == native_mode->hdisplay && in nv50_outp_atomic_check_view()
378 mode->vdisplay == native_mode->vdisplay && in nv50_outp_atomic_check_view()
381 mode = native_mode; in nv50_outp_atomic_check_view()
388 mode = native_mode; in nv50_outp_atomic_check_view()
439 nv_connector->native_mode); in nv50_outp_atomic_check()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm.c | 4655 const struct drm_display_mode *native_mode, in decide_crtc_timing_for_drm_display_mode() argument
4659 copy_crtc_timing_for_drm_display_mode(native_mode, drm_mode); in decide_crtc_timing_for_drm_display_mode()
4660 } else if (native_mode->clock == drm_mode->clock && in decide_crtc_timing_for_drm_display_mode()
4661 native_mode->htotal == drm_mode->htotal && in decide_crtc_timing_for_drm_display_mode()
4662 native_mode->vtotal == drm_mode->vtotal) { in decide_crtc_timing_for_drm_display_mode()
4663 copy_crtc_timing_for_drm_display_mode(native_mode, drm_mode); in decide_crtc_timing_for_drm_display_mode()
6341 amdgpu_encoder->native_mode.clock = 0; in amdgpu_dm_get_native_mode()
6350 amdgpu_encoder->native_mode = *preferred_mode; in amdgpu_dm_get_native_mode()
6366 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_dm_create_common_mode() local
6368 mode = drm_mode_duplicate(dev, native_mode); in amdgpu_dm_create_common_mode()
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| /drivers/gpu/drm/tilcdc/ |
| D | tilcdc_panel.c | 156 if (timings->native_mode == i) in panel_connector_get_modes()
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