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Searched refs:num_banks (Results 1 – 25 of 58) sorted by relevance

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/drivers/crypto/qat/qat_common/
Dadf_isr.c30 msix_num_entries += hw_data->num_banks; in adf_enable_msix()
35 hw_data->num_banks; in adf_enable_msix()
131 for (i = 0; i < hw_data->num_banks; i++) { in adf_request_irqs()
147 cpu = ((accel_dev->accel_id * hw_data->num_banks) + in adf_request_irqs()
177 for (i = 0; i < hw_data->num_banks; i++) { in adf_free_irqs()
196 msix_num_entries += hw_data->num_banks; in adf_isr_alloc_msix_entry_table()
242 for (i = 0; i < hw_data->num_banks; i++) in adf_setup_bh()
255 for (i = 0; i < hw_data->num_banks; i++) { in adf_cleanup_bh()
Dadf_transport.c422 u32 num_banks = 0; in adf_init_etr_data() local
430 num_banks = GET_MAX_BANKS(accel_dev); in adf_init_etr_data()
431 size = num_banks * sizeof(struct adf_etr_bank_data); in adf_init_etr_data()
447 for (i = 0; i < num_banks; i++) { in adf_init_etr_data()
488 u32 i, num_banks = GET_MAX_BANKS(accel_dev); in adf_cleanup_etr_handles() local
490 for (i = 0; i < num_banks; i++) in adf_cleanup_etr_handles()
Dadf_accel_devices.h141 u8 num_banks; member
158 #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
/drivers/soc/qcom/
Dllcc-qcom.c357 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; in qcom_llcc_cfg_program()
408 u32 num_banks; in qcom_llcc_probe() local
439 &num_banks); in qcom_llcc_probe()
443 num_banks &= LLCC_LB_CNT_MASK; in qcom_llcc_probe()
444 num_banks >>= LLCC_LB_CNT_SHIFT; in qcom_llcc_probe()
445 drv_data->num_banks = num_banks; in qcom_llcc_probe()
455 drv_data->offsets = devm_kcalloc(dev, num_banks, sizeof(u32), in qcom_llcc_probe()
462 for (i = 0; i < num_banks; i++) in qcom_llcc_probe()
Docmem.c310 int i, j, ret, num_banks; in ocmem_dev_probe() local
375 num_banks = ocmem->num_ports / 2; in ocmem_dev_probe()
376 region_size = ocmem->config->macro_size * num_banks; in ocmem_dev_probe()
392 if (WARN_ON(num_banks > ARRAY_SIZE(region->macro_state))) { in ocmem_dev_probe()
398 region->num_macros = num_banks; in ocmem_dev_probe()
/drivers/mtd/nand/raw/ingenic/
Dingenic_nand_drv.c47 unsigned int num_banks; member
455 if (num_chips > nfc->num_banks) { in ingenic_nand_init_chips()
457 num_chips, nfc->num_banks); in ingenic_nand_init_chips()
478 unsigned int num_banks; in ingenic_nand_probe() local
482 num_banks = jz4780_nemc_num_banks(dev); in ingenic_nand_probe()
483 if (num_banks == 0) { in ingenic_nand_probe()
488 nfc = devm_kzalloc(dev, struct_size(nfc, cs, num_banks), GFP_KERNEL); in ingenic_nand_probe()
505 nfc->num_banks = num_banks; in ingenic_nand_probe()
/drivers/gpio/
Dgpio-brcmstb.c373 int num_banks = in brcmstb_gpio_sanity_check_banks() local
376 if (res_num_banks != num_banks) { in brcmstb_gpio_sanity_check_banks()
378 res_num_banks, num_banks); in brcmstb_gpio_sanity_check_banks()
659 int num_banks = 0; in brcmstb_gpio_probe() local
714 num_banks); in brcmstb_gpio_probe()
715 num_banks++; in brcmstb_gpio_probe()
727 bank->id = num_banks; in brcmstb_gpio_probe()
787 num_banks++; in brcmstb_gpio_probe()
Dgpio-stmpe.c182 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); in stmpe_gpio_irq_sync_unlock() local
213 for (j = 0; j < num_banks; j++) { in stmpe_gpio_irq_sync_unlock()
376 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); in stmpe_gpio_irq() local
394 ret = stmpe_block_read(stmpe, statmsbreg, num_banks, status); in stmpe_gpio_irq()
398 for (i = 0; i < num_banks; i++) { in stmpe_gpio_irq()
400 num_banks - i - 1; in stmpe_gpio_irq()
/drivers/thermal/
Dmtk_thermal.c259 s32 num_banks; member
402 .num_banks = MT8173_NUM_ZONES,
442 .num_banks = 1,
473 .num_banks = 1,
498 .num_banks = MT7622_NUM_ZONES,
530 .num_banks = MT8183_NUM_ZONES,
686 for (i = 0; i < mt->conf->num_banks; i++) { in mtk_read_temp()
1077 for (i = 0; i < mt->conf->num_banks; i++) in mtk_thermal_probe()
/drivers/leds/
Dleds-lm3697.c81 int num_banks; member
184 for (i = 0; i < priv->num_banks; i++) { in lm3697_init()
317 led->num_banks = count; in lm3697_probe()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_socbb.h68 uint32_t num_banks; member
Damdgpu_gfx.h134 uint8_t num_banks; member
163 unsigned num_banks; member
/drivers/edac/
Dqcom_edac.c298 for (i = 0; i < drv->num_banks; i++) { in llcc_ecc_irq_handler()
349 llcc_driv_data->num_banks, 1, in qcom_llcc_edac_probe()
/drivers/crypto/qat/qat_c3xxxvf/
Dadf_c3xxxvf_hw_data.c71 hw_data->num_banks = ADF_C3XXXIOV_ETR_MAX_BANKS; in adf_init_hw_data_c3xxxiov()
/drivers/crypto/qat/qat_dh895xccvf/
Dadf_dh895xccvf_hw_data.c71 hw_data->num_banks = ADF_DH895XCCIOV_ETR_MAX_BANKS; in adf_init_hw_data_dh895xcciov()
/drivers/crypto/qat/qat_c62xvf/
Dadf_c62xvf_hw_data.c71 hw_data->num_banks = ADF_C62XIOV_ETR_MAX_BANKS; in adf_init_hw_data_c62xiov()
/drivers/gpu/drm/amd/display/dc/core/
Ddc_debug.c141 plane_state->tiling_info.gfx8.num_banks, in pre_surface_trace()
233 update->plane_info->tiling_info.gfx8.num_banks, in update_surface_trace()
/drivers/pinctrl/meson/
Dpinctrl-meson.h117 unsigned int num_banks; member
/drivers/gpu/drm/amd/display/dc/
Ddc_hw_types.h323 unsigned int num_banks; member
385 unsigned int num_banks; member
/drivers/memory/
Djedec_ddr.h117 u32 num_banks; member
/drivers/pinctrl/bcm/
Dpinctrl-iproc-gpio.c111 unsigned num_banks; member
173 for (i = 0; i < chip->num_banks; i++) { in iproc_gpio_irq_handler()
839 chip->num_banks = (ngpios + NGPIOS_PER_BANK - 1) / NGPIOS_PER_BANK; in iproc_gpio_probe()
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_mem_input.c438 GRPH_NUM_BANKS, log_2(info->gfx9.num_banks), in program_tiling()
451 GRPH_NUM_BANKS, info->gfx8.num_banks, in program_tiling()
468 GRPH_NUM_BANKS, info->gfx8.num_banks, in program_tiling()
/drivers/gpu/drm/amd/include/
Dkgd_kfd_interface.h164 uint32_t num_banks; member
/drivers/crypto/qat/qat_dh895xcc/
Dadf_dh895xcc_hw_data.c187 hw_data->num_banks = ADF_DH895XCC_ETR_MAX_BANKS; in adf_init_hw_data_dh895xcc()
/drivers/crypto/qat/qat_c62x/
Dadf_c62x_hw_data.c188 hw_data->num_banks = ADF_C62X_ETR_MAX_BANKS; in adf_init_hw_data_c62x()

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