Searched refs:num_vcn_inst (Results 1 – 8 of 8) sorted by relevance
80 adev->vcn.num_vcn_inst = 2; in vcn_v2_5_early_init()86 adev->vcn.num_vcn_inst = VCN25_MAX_HW_INSTANCES_ARCTURUS; in vcn_v2_5_early_init()87 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in vcn_v2_5_early_init()120 for (j = 0; j < adev->vcn.num_vcn_inst; j++) { in vcn_v2_5_sw_init()150 if (adev->vcn.num_vcn_inst == VCN25_MAX_HW_INSTANCES_ARCTURUS) { in vcn_v2_5_sw_init()163 for (j = 0; j < adev->vcn.num_vcn_inst; j++) { in vcn_v2_5_sw_init()242 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in vcn_v2_5_sw_fini()280 for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { in vcn_v2_5_hw_init()331 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in vcn_v2_5_hw_fini()399 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in vcn_v2_5_mc_resume()[all …]
86 adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID; in vcn_v3_0_early_init()95 adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID; in vcn_v3_0_early_init()96 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in vcn_v3_0_early_init()107 adev->vcn.num_vcn_inst = 1; in vcn_v3_0_early_init()145 if (adev->vcn.num_vcn_inst == VCN_INSTANCES_SIENNA_CICHLID) { in vcn_v3_0_sw_init()164 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in vcn_v3_0_sw_init()289 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in vcn_v3_0_hw_init()308 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in vcn_v3_0_hw_init()352 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in vcn_v3_0_hw_fini()1050 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in vcn_v3_0_start()[all …]
75 for (i = 0; i < adev->vcn.num_vcn_inst; i++) in amdgpu_vcn_sw_init()188 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in amdgpu_vcn_sw_init()225 for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { in amdgpu_vcn_sw_fini()261 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in amdgpu_vcn_suspend()285 for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { in amdgpu_vcn_resume()323 for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { in amdgpu_vcn_idle_work_handler()
219 uint8_t num_vcn_inst; member
407 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in amdgpu_hw_ip_info()419 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in amdgpu_hw_ip_info()
70 adev->vcn.num_vcn_inst = 1; in vcn_v1_0_early_init()
72 adev->vcn.num_vcn_inst = 1; in vcn_v2_0_early_init()
678 if (adev->vcn.num_vcn_inst > 1) { in sienna_cichlid_set_default_dpm_table()717 if (adev->vcn.num_vcn_inst > 1) { in sienna_cichlid_set_default_dpm_table()823 if (adev->vcn.num_vcn_inst > 1) { in sienna_cichlid_dpm_set_vcn_enable()835 if (adev->vcn.num_vcn_inst > 1) { in sienna_cichlid_dpm_set_vcn_enable()