| /drivers/pinctrl/samsung/ |
| D | pinctrl-samsung.c | 48 static unsigned int pin_base; variable
365 while ((pin >= b->pin_base) && in pin_to_reg_bank()
366 ((b->pin_base + b->nr_pins - 1) < pin)) in pin_to_reg_bank()
370 *offset = pin - b->pin_base; in pin_to_reg_bank()
392 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base, in samsung_pinmux_setup()
444 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, ®_base, in samsung_pinconf_rw()
879 pdesc->number = pin + drvdata->pin_base; in samsung_pinctrl_register()
897 pdesc = pindesc + pin_bank->pin_base + pin; in samsung_pinctrl_register()
918 pin_bank->grange.pin_base = drvdata->pin_base in samsung_pinctrl_register()
919 + pin_bank->pin_base; in samsung_pinctrl_register()
[all …]
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| D | pinctrl-samsung.h | 166 u32 pin_base; member
286 unsigned int pin_base; member
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| /drivers/irqchip/ |
| D | qcom-pdc.c | 38 u32 pin_base; member
312 if (pin >= region->pin_base && in get_parent_hwirq()
313 pin < region->pin_base + region->cnt) in get_parent_hwirq()
314 return (region->parent_base + pin - region->pin_base); in get_parent_hwirq()
452 &pdc_region[n].pin_base); in pdc_setup_pin_mapping()
467 reg_index = (i + pdc_region[n].pin_base) >> 5; in pdc_setup_pin_mapping()
468 irq_index = (i + pdc_region[n].pin_base) & 0x1f; in pdc_setup_pin_mapping()
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| /drivers/pinctrl/ |
| D | pinctrl-equilibrium.c | 266 if (pin >= bank->pin_base && in find_pinbank_via_pin()
267 (pin - bank->pin_base) < bank->nr_pins) in find_pinbank_via_pin()
296 offset = pin - bank->pin_base; in eqbr_set_pin_mux()
301 pin, bank->pin_base, bank->aval_pinmap); in eqbr_set_pin_mux()
393 offset = pin - bank->pin_base; in eqbr_pinconf_get()
398 pin, bank->pin_base, bank->aval_pinmap); in eqbr_pinconf_get()
423 bank->pin_base, pin); in eqbr_pinconf_get()
464 offset = pin - bank->pin_base; in eqbr_pinconf_set()
492 bank->pin_base, pin); in eqbr_pinconf_set()
836 bank->pin_base = spec.args[1]; in pinbank_init()
[all …]
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| D | pinctrl-rockchip.c | 163 u32 pin_base; member
463 while (pin >= (b->pin_base + b->nr_pins)) in pin_to_bank()
2303 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
2312 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
2450 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2465 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2472 pin - bank->pin_base, arg); in rockchip_pinconf_set()
2474 pin - bank->pin_base, false); in rockchip_pinconf_set()
2484 pin - bank->pin_base, arg); in rockchip_pinconf_set()
2493 pin - bank->pin_base, arg); in rockchip_pinconf_set()
[all …]
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| D | core.c | 279 return range->pin_base + offset; in gpio_to_pin()
476 } else if (pin >= range->pin_base && in pinctrl_find_gpio_range_from_pin_nolock()
477 pin < range->pin_base + range->npins) in pinctrl_find_gpio_range_from_pin_nolock()
1630 if ((pin >= range->pin_base) && in pinctrl_pins_show()
1631 (pin < (range->pin_base + range->npins))) { in pinctrl_pins_show()
1632 gpio_num = range->base + (pin - range->pin_base); in pinctrl_pins_show()
1729 range->pin_base, in pinctrl_gpioranges_show()
1730 (range->pin_base + range->npins - 1)); in pinctrl_gpioranges_show()
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| D | pinctrl-equilibrium.h | 93 unsigned int pin_base; member
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| D | pinctrl-coh901.c | 592 unsigned int pin_base; member
595 #define COH901_PINRANGE(a, b) { .offset = a, .pin_base = b }
717 p->offset, p->pin_base, 1); in u300_gpio_probe()
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| D | pinctrl-pistachio.c | 96 unsigned int pin_base; member
986 gpio_disable(gpiochip_get_data(range->gc), pg->pin - range->pin_base); in pistachio_pinmux_enable()
1315 .pin_base = _pin_base, \
1415 bank->pin_base, bank->npins); in pistachio_gpio_register()
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| /drivers/pinctrl/sunxi/ |
| D | pinctrl-sunxi.c | 488 pin -= pctl->desc->pin_base; in sunxi_pconf_get()
547 pin -= pctl->desc->pin_base; in sunxi_pconf_set()
643 pin -= pctl->desc->pin_base; in sunxi_pinctrl_set_io_bias_cfg()
719 pin -= pctl->desc->pin_base; in sunxi_pmx_set()
776 unsigned short bank_offset = bank - pctl->desc->pin_base / in sunxi_pmx_request()
820 unsigned short bank_offset = bank - pctl->desc->pin_base / in sunxi_pmx_free()
924 unsigned pinnum = pctl->desc->pin_base + offset; in sunxi_pinctrl_gpio_to_irq()
954 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_request_resources()
972 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_release_resources()
1125 pin = pctl->desc->pin_base + base + intspec[1]; in sunxi_pinctrl_irq_of_xlate()
[all …]
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| D | pinctrl-sun8i-h3-r.c | 84 .pin_base = PL_BASE,
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| D | pinctrl-sun50i-a100-r.c | 83 .pin_base = PL_BASE,
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| D | pinctrl-sun8i-a83t-r.c | 106 .pin_base = PL_BASE,
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| D | pinctrl-sun50i-a64-r.c | 103 .pin_base = PL_BASE,
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| D | pinctrl-sun50i-h6-r.c | 106 .pin_base = PL_BASE,
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| D | pinctrl-sun8i-a23-r.c | 94 .pin_base = PL_BASE,
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| D | pinctrl-sun6i-a31-r.c | 107 .pin_base = PL_BASE,
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| D | pinctrl-sun9i-a80-r.c | 153 .pin_base = PL_BASE,
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| /drivers/pinctrl/intel/ |
| D | pinctrl-merrifield.c | 66 unsigned int pin_base; member
75 .pin_base = (s), \
82 .pin_base = (s), \
440 #define pin_to_bufno(f, p) ((p) - (f)->pin_base)
450 if (pin >= family->pin_base && in mrfld_get_family()
451 pin < family->pin_base + family->npins) in mrfld_get_family()
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| D | pinctrl-lynxpoint.c | 31 .pin_base = (p), \
215 if (pin < comm->pin_base + comm->npins && pin >= comm->pin_base) in lp_get_community()
233 offset -= comm->pin_base; in lp_gpio_reg()
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| D | pinctrl-intel.h | 128 unsigned int pin_base; member
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| D | pinctrl-denverton.c | 38 .pin_base = (s), \
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| D | pinctrl-lewisburg.c | 32 .pin_base = (s), \
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| /drivers/gpio/ |
| D | gpio-merrifield.c | 39 unsigned int pin_base; member
46 .pin_base = (pstart), \
415 range->pin_base, in mrfld_gpio_add_pin_ranges()
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| /drivers/pinctrl/mvebu/ |
| D | pinctrl-mvebu.h | 188 .pin_base = _pinbase, \
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