Searched refs:pipe_cnt (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 1972 int pipe_cnt, i; in dcn20_populate_dml_writeback_from_context() local
1974 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn20_populate_dml_writeback_from_context()
1981 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1982 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1983 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1984 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1985 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1986 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1987 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1988 pipes[pipe_cnt].dout.wb.wb_vtaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
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| D | dcn20_resource.h | 119 int pipe_cnt);
159 int pipe_cnt,
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| /drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 1031 int pipe_cnt) in calculate_wm_set_for_vlevel() argument
1045 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1046 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel()
1047 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1048 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1049 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1050 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1051 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1052 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1094 int pipe_cnt, i, pipe_idx; in dcn21_calculate_wm() local
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 1452 int i, pipe_cnt; in dcn30_populate_dml_pipes_from_context() local
1457 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_populate_dml_pipes_from_context()
1461 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1465 return pipe_cnt; in dcn30_populate_dml_pipes_from_context()
1471 int pipe_cnt, i, j; in dcn30_populate_dml_writeback_from_context() local
1476 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_populate_dml_writeback_from_context()
1484 pipes[pipe_cnt].dout.wb_enable = 0; in dcn30_populate_dml_writeback_from_context()
1485 pipes[pipe_cnt].dout.num_active_wb = 0; in dcn30_populate_dml_writeback_from_context()
1491 pipes[pipe_cnt].dout.wb_enable = 1; in dcn30_populate_dml_writeback_from_context()
1492 pipes[pipe_cnt].dout.num_active_wb++; in dcn30_populate_dml_writeback_from_context()
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| D | dcn30_resource.h | 49 int pipe_cnt);
61 int pipe_cnt,
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_lib.h | 88 int pipe_cnt);
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| D | display_mode_lib.c | 130 int pipe_cnt) in dml_log_pipe_params() argument
140 for (i = 0; i < pipe_cnt; i++) { in dml_log_pipe_params()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | core_types.h | 107 int pipe_cnt,
150 int pipe_cnt);
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| /drivers/usb/host/ |
| D | r8a66597.h | 79 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; member
120 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; member
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| D | r8a66597-hcd.c | 689 if (r8a66597->pipe_cnt[min] > r8a66597->pipe_cnt[array[i]]) in get_empty_pipenum()
806 r8a66597->pipe_cnt[pipe->info.pipenum]++; in enable_r8a66597_pipe()
807 dev->pipe_cnt[pipe->info.pipenum]++; in enable_r8a66597_pipe()
868 if (!dev->pipe_cnt[pipenum]) in disable_r8a66597_pipe_all()
876 r8a66597->pipe_cnt[pipenum] -= dev->pipe_cnt[pipenum]; in disable_r8a66597_pipe_all()
877 dev->pipe_cnt[pipenum] = 0; in disable_r8a66597_pipe_all()
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