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Searched refs:pp (Results 1 – 25 of 160) sorted by relevance

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/drivers/ntb/test/
Dntb_pingpong.c116 static int pp_find_next_peer(struct pp_ctx *pp) in pp_find_next_peer() argument
121 link = ntb_link_is_up(pp->ntb, NULL, NULL); in pp_find_next_peer()
124 if (link & pp->nmask) in pp_find_next_peer()
125 pidx = __ffs64(link & pp->nmask); in pp_find_next_peer()
126 else if (link & pp->pmask) in pp_find_next_peer()
127 pidx = __ffs64(link & pp->pmask); in pp_find_next_peer()
131 out_db = BIT_ULL(ntb_peer_port_number(pp->ntb, pidx)); in pp_find_next_peer()
133 spin_lock(&pp->lock); in pp_find_next_peer()
134 pp->out_pidx = pidx; in pp_find_next_peer()
135 pp->out_db = out_db; in pp_find_next_peer()
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/drivers/net/ethernet/marvell/
Dmvneta.c447 struct mvneta_port *pp; member
722 static void mvreg_write(struct mvneta_port *pp, u32 offset, u32 data) in mvreg_write() argument
724 writel(data, pp->base + offset); in mvreg_write()
728 static u32 mvreg_read(struct mvneta_port *pp, u32 offset) in mvreg_read() argument
730 return readl(pp->base + offset); in mvreg_read()
751 static void mvneta_mib_counters_clear(struct mvneta_port *pp) in mvneta_mib_counters_clear() argument
757 mvreg_read(pp, (MVNETA_MIB_COUNTERS_BASE + i)); in mvneta_mib_counters_clear()
758 mvreg_read(pp, MVNETA_RX_DISCARD_FRAME_COUNT); in mvneta_mib_counters_clear()
759 mvreg_read(pp, MVNETA_OVERRUN_FRAME_COUNT); in mvneta_mib_counters_clear()
767 struct mvneta_port *pp = netdev_priv(dev); in mvneta_get_stats64() local
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/drivers/pci/controller/dwc/
Dpcie-designware-host.c56 irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) in dw_handle_msi_irq() argument
62 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dw_handle_msi_irq()
64 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; in dw_handle_msi_irq()
77 irq = irq_find_mapping(pp->irq_domain, in dw_handle_msi_irq()
93 struct pcie_port *pp; in dw_chained_msi_isr() local
97 pp = irq_desc_get_handler_data(desc); in dw_chained_msi_isr()
98 dw_handle_msi_irq(pp); in dw_chained_msi_isr()
105 struct pcie_port *pp = irq_data_get_irq_chip_data(d); in dw_pci_setup_msi_msg() local
106 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dw_pci_setup_msi_msg()
109 msi_target = (u64)pp->msi_data; in dw_pci_setup_msi_msg()
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Dpci-dra7xx.c179 static int dra7xx_pcie_host_init(struct pcie_port *pp) in dra7xx_pcie_host_init() argument
181 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dra7xx_pcie_host_init()
184 dw_pcie_setup_rc(pp); in dra7xx_pcie_host_init()
188 dw_pcie_msi_init(pp); in dra7xx_pcie_host_init()
208 static int dra7xx_pcie_handle_msi(struct pcie_port *pp, int index) in dra7xx_pcie_handle_msi() argument
210 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dra7xx_pcie_handle_msi()
221 irq = irq_find_mapping(pp->irq_domain, in dra7xx_pcie_handle_msi()
231 static void dra7xx_pcie_handle_msi_irq(struct pcie_port *pp) in dra7xx_pcie_handle_msi_irq() argument
233 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dra7xx_pcie_handle_msi_irq()
236 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_handle_msi_irq()
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Dpcie-uniphier.c176 struct pcie_port *pp = irq_data_get_irq_chip_data(d); in uniphier_pcie_irq_mask() local
177 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in uniphier_pcie_irq_mask()
182 raw_spin_lock_irqsave(&pp->lock, flags); in uniphier_pcie_irq_mask()
188 raw_spin_unlock_irqrestore(&pp->lock, flags); in uniphier_pcie_irq_mask()
193 struct pcie_port *pp = irq_data_get_irq_chip_data(d); in uniphier_pcie_irq_unmask() local
194 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in uniphier_pcie_irq_unmask()
199 raw_spin_lock_irqsave(&pp->lock, flags); in uniphier_pcie_irq_unmask()
205 raw_spin_unlock_irqrestore(&pp->lock, flags); in uniphier_pcie_irq_unmask()
230 struct pcie_port *pp = irq_desc_get_handler_data(desc); in uniphier_pcie_irq_handler() local
231 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in uniphier_pcie_irq_handler()
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Dpcie-spear13xx.c72 struct pcie_port *pp = &pci->pp; in spear13xx_pcie_establish_link() local
82 dw_pcie_setup_rc(pp); in spear13xx_pcie_establish_link()
110 struct pcie_port *pp = &pci->pp; in spear13xx_pcie_irq_handler() local
117 dw_handle_msi_irq(pp); in spear13xx_pcie_irq_handler()
128 struct pcie_port *pp = &pci->pp; in spear13xx_pcie_enable_interrupts() local
133 dw_pcie_msi_init(pp); in spear13xx_pcie_enable_interrupts()
150 static int spear13xx_pcie_host_init(struct pcie_port *pp) in spear13xx_pcie_host_init() argument
152 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in spear13xx_pcie_host_init()
169 struct pcie_port *pp = &pci->pp; in spear13xx_add_pcie_port() local
173 pp->irq = platform_get_irq(pdev, 0); in spear13xx_add_pcie_port()
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/drivers/spi/
Dspi-lm70llp.c96 static inline void deassertCS(struct spi_lm70llp *pp) in deassertCS() argument
98 u8 data = parport_read_data(pp->port); in deassertCS()
101 parport_write_data(pp->port, data | nCS); in deassertCS()
104 static inline void assertCS(struct spi_lm70llp *pp) in assertCS() argument
106 u8 data = parport_read_data(pp->port); in assertCS()
109 parport_write_data(pp->port, data & ~nCS); in assertCS()
112 static inline void clkHigh(struct spi_lm70llp *pp) in clkHigh() argument
114 u8 data = parport_read_data(pp->port); in clkHigh()
116 parport_write_data(pp->port, data | SCLK); in clkHigh()
119 static inline void clkLow(struct spi_lm70llp *pp) in clkLow() argument
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Dspi-butterfly.c69 struct butterfly *pp = spidev_to_pp(spi); in setsck() local
70 u8 bit, byte = pp->lastbyte; in setsck()
78 parport_write_data(pp->port, byte); in setsck()
79 pp->lastbyte = byte; in setsck()
85 struct butterfly *pp = spidev_to_pp(spi); in setmosi() local
86 u8 bit, byte = pp->lastbyte; in setmosi()
94 parport_write_data(pp->port, byte); in setmosi()
95 pp->lastbyte = byte; in setmosi()
100 struct butterfly *pp = spidev_to_pp(spi); in getmiso() local
107 value = !(parport_read_status(pp->port) & bit); in getmiso()
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/drivers/char/
Dppdev.c108 static inline void pp_enable_irq(struct pp_struct *pp) in pp_enable_irq() argument
110 struct parport *port = pp->pdev->port; in pp_enable_irq()
119 struct pp_struct *pp = file->private_data; in pp_read() local
125 if (!(pp->flags & PP_CLAIMED)) { in pp_read()
138 pport = pp->pdev->port; in pp_read()
141 parport_set_timeout(pp->pdev, in pp_read()
144 pp->default_inactivity); in pp_read()
154 if (pp->flags & PP_W91284PIC) in pp_read()
156 if (pp->flags & PP_FASTREAD) in pp_read()
183 parport_set_timeout(pp->pdev, pp->default_inactivity); in pp_read()
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/drivers/usb/misc/
Duss720.c49 struct parport *pp; member
99 struct parport *pp; in async_complete() local
105 pp = priv->pp; in async_complete()
116 if (rq->reg[2] & rq->reg[1] & 0x10 && pp) in async_complete()
117 parport_generic_irq(pp); in async_complete()
193 static int get_1284_register(struct parport *pp, unsigned char reg, unsigned char *val, gfp_t mem_f… in get_1284_register() argument
202 if (!pp) in get_1284_register()
204 priv = pp->private_data; in get_1284_register()
229 static int set_1284_register(struct parport *pp, unsigned char reg, unsigned char val, gfp_t mem_fl… in set_1284_register() argument
234 if (!pp) in set_1284_register()
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/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h50 const void *pp; member
103 void (*set_display_count)(struct pp_smu *pp, int count);
112 void (*set_wm_ranges)(struct pp_smu *pp,
118 void (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int mhz);
124 void (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int mhz);
129 void (*set_hard_min_fclk_by_freq)(struct pp_smu *pp, int mhz);
134 void (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int mhz);
137 void (*set_pme_wa_enable)(struct pp_smu *pp);
173 enum pp_smu_status (*set_display_count)(struct pp_smu *pp, int count);
178 enum pp_smu_status (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int Mhz);
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/drivers/ata/
Dsata_nv.c591 struct nv_adma_port_priv *pp = ap->private_data; in nv_adma_register_mode() local
592 void __iomem *mmio = pp->ctl_block; in nv_adma_register_mode()
596 if (pp->flags & NV_ADMA_PORT_REGISTER_MODE) in nv_adma_register_mode()
624 pp->flags |= NV_ADMA_PORT_REGISTER_MODE; in nv_adma_register_mode()
629 struct nv_adma_port_priv *pp = ap->private_data; in nv_adma_mode() local
630 void __iomem *mmio = pp->ctl_block; in nv_adma_mode()
634 if (!(pp->flags & NV_ADMA_PORT_REGISTER_MODE)) in nv_adma_mode()
637 WARN_ON(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE); in nv_adma_mode()
654 pp->flags &= ~NV_ADMA_PORT_REGISTER_MODE; in nv_adma_mode()
660 struct nv_adma_port_priv *pp = ap->private_data; in nv_adma_slave_config() local
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Dpdc_adma.c190 struct adma_port_priv *pp = ap->private_data; in adma_reinit_engine() local
204 writel((u32)pp->pkt_dma, chan + ADMA_CPB_NEXT); in adma_reinit_engine()
247 struct adma_port_priv *pp = ap->private_data; in adma_prereset() local
249 if (pp->state != adma_state_idle) /* healthy paranoia */ in adma_prereset()
250 pp->state = adma_state_mmio; in adma_prereset()
260 struct adma_port_priv *pp = ap->private_data; in adma_fill_sg() local
261 u8 *buf = pp->pkt, *last_buf = NULL; in adma_fill_sg()
285 (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4); in adma_fill_sg()
300 struct adma_port_priv *pp = qc->ap->private_data; in adma_qc_prep() local
301 u8 *buf = pp->pkt; in adma_qc_prep()
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/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_pingpong.c41 static const struct dpu_pingpong_cfg *_pingpong_offset(enum dpu_pingpong pp, in _pingpong_offset() argument
49 if (pp == m->pingpong[i].id) { in _pingpong_offset()
62 static void dpu_hw_pp_setup_dither(struct dpu_hw_pingpong *pp, in dpu_hw_pp_setup_dither() argument
68 c = &pp->hw; in dpu_hw_pp_setup_dither()
69 base = pp->caps->sblk->dither.base; in dpu_hw_pp_setup_dither()
93 static int dpu_hw_pp_setup_te_config(struct dpu_hw_pingpong *pp, in dpu_hw_pp_setup_te_config() argument
99 if (!pp || !te) in dpu_hw_pp_setup_te_config()
101 c = &pp->hw; in dpu_hw_pp_setup_te_config()
123 static int dpu_hw_pp_poll_timeout_wr_ptr(struct dpu_hw_pingpong *pp, in dpu_hw_pp_poll_timeout_wr_ptr() argument
130 if (!pp) in dpu_hw_pp_poll_timeout_wr_ptr()
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/drivers/macintosh/
Dsmu.c1085 struct smu_private *pp; in smu_open() local
1088 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL); in smu_open()
1089 if (pp == 0) in smu_open()
1091 spin_lock_init(&pp->lock); in smu_open()
1092 pp->mode = smu_file_commands; in smu_open()
1093 init_waitqueue_head(&pp->wait); in smu_open()
1097 list_add(&pp->list, &smu_clist); in smu_open()
1099 file->private_data = pp; in smu_open()
1108 struct smu_private *pp = misc; in smu_user_cmd_done() local
1110 wake_up_all(&pp->wait); in smu_user_cmd_done()
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/drivers/net/hamradio/
Dbaycom_par.c183 struct parport *pp = bc->pdev->port; in par96_tx() local
196 pp->ops->write_data(pp, val); in par96_tx()
197 pp->ops->write_data(pp, val | PAR96_BURST); in par96_tx()
207 struct parport *pp = bc->pdev->port; in par96_rx() local
214 if (pp->ops->read_status(pp) & PAR96_RXBIT) in par96_rx()
219 pp->ops->write_data(pp, PAR97_POWER | PAR96_PTT); in par96_rx()
225 pp->ops->write_data(pp, PAR97_POWER | PAR96_PTT | PAR96_BURST); in par96_rx()
250 hdlcdrv_setdcd(&bc->hdrv, !!(pp->ops->read_status(pp) & PAR96_DCD)); in par96_rx()
299 struct parport *pp; in par96_open() local
304 pp = parport_find_base(dev->base_addr); in par96_open()
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Dbaycom_epp.c422 struct parport *pp = bc->pdev->port; in transmit() local
461 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) in transmit()
479 if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0)) in transmit()
497 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) in transmit()
514 if (j != pp->ops->epp_write_data(pp, tmp, j, 0)) in transmit()
554 struct parport *pp = bc->pdev->port; in receive() local
568 if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) { in receive()
641 struct parport *pp; in epp_bh() local
652 pp = bc->pdev->port; in epp_bh()
654 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1) in epp_bh()
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/drivers/staging/ks7010/
Dks_hostif.c1063 struct hostif_data_request *pp; in hostif_data_request() local
1098 size = sizeof(*pp) + 6 + skb_len + 8; in hostif_data_request()
1099 pp = kmalloc(hif_align_size(size), GFP_ATOMIC); in hostif_data_request()
1100 if (!pp) { in hostif_data_request()
1105 p = (unsigned char *)pp->data; in hostif_data_request()
1151 eth_hdr = (struct ether_hdr *)&pp->data[0]; in hostif_data_request()
1170 pp->auth_type = cpu_to_le16(TYPE_AUTH); in hostif_data_request()
1176 &pp->data[0], skb_len, in hostif_data_request()
1185 pp->auth_type = in hostif_data_request()
1189 pp->auth_type = in hostif_data_request()
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/drivers/net/ethernet/cisco/enic/
Denic_pp.c72 struct enic_port_profile *pp; in enic_set_port_profile() local
81 ENIC_PP_BY_INDEX(enic, vf, pp, &err); in enic_set_port_profile()
85 if (!(pp->set & ENIC_SET_NAME) || !strlen(pp->name)) in enic_set_port_profile()
95 strlen(pp->name) + 1, pp->name); in enic_set_port_profile()
97 if (!is_zero_ether_addr(pp->mac_addr)) { in enic_set_port_profile()
98 client_mac = pp->mac_addr; in enic_set_port_profile()
117 if (pp->set & ENIC_SET_INSTANCE) { in enic_set_port_profile()
118 sprintf(uuid_str, "%pUB", pp->instance_uuid); in enic_set_port_profile()
124 if (pp->set & ENIC_SET_HOST) { in enic_set_port_profile()
125 sprintf(uuid_str, "%pUB", pp->host_uuid); in enic_set_port_profile()
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/drivers/of/
Dkobj.c35 struct property *pp = container_of(bin_attr, struct property, attr); in of_node_property_read() local
36 return memory_read_from_buffer(buf, count, &offset, pp->value, pp->length); in of_node_property_read()
63 int __of_add_property_sysfs(struct device_node *np, struct property *pp) in __of_add_property_sysfs() argument
68 bool secure = strncmp(pp->name, "security-", 9) == 0; in __of_add_property_sysfs()
76 sysfs_bin_attr_init(&pp->attr); in __of_add_property_sysfs()
77 pp->attr.attr.name = safe_name(&np->kobj, pp->name); in __of_add_property_sysfs()
78 pp->attr.attr.mode = secure ? 0400 : 0444; in __of_add_property_sysfs()
79 pp->attr.size = secure ? 0 : pp->length; in __of_add_property_sysfs()
80 pp->attr.read = of_node_property_read; in __of_add_property_sysfs()
82 rc = sysfs_create_bin_file(&np->kobj, &pp->attr); in __of_add_property_sysfs()
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/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_cfg.c66 { .id = 0, .pp = 0, .dspp = 0,
68 { .id = 1, .pp = 1, .dspp = 1,
70 { .id = 2, .pp = 2, .dspp = 2,
72 { .id = 3, .pp = -1, .dspp = -1,
74 { .id = 4, .pp = -1, .dspp = -1,
85 .pp = {
144 { .id = 0, .pp = 0, .dspp = 0,
146 { .id = 1, .pp = 1, .dspp = 1,
148 { .id = 2, .pp = 2, .dspp = 2,
150 { .id = 3, .pp = -1, .dspp = -1,
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/drivers/mtd/parsers/
Dofpart.c19 static bool node_has_compatible(struct device_node *pp) in node_has_compatible() argument
21 return of_get_property(pp, "compatible", NULL); in node_has_compatible()
32 struct device_node *pp; in parse_fixed_partitions() local
60 for_each_child_of_node(ofpart_node, pp) { in parse_fixed_partitions()
61 if (!dedicated && node_has_compatible(pp)) in parse_fixed_partitions()
75 for_each_child_of_node(ofpart_node, pp) { in parse_fixed_partitions()
80 if (!dedicated && node_has_compatible(pp)) in parse_fixed_partitions()
83 reg = of_get_property(pp, "reg", &len); in parse_fixed_partitions()
87 master->name, pp, in parse_fixed_partitions()
96 a_cells = of_n_addr_cells(pp); in parse_fixed_partitions()
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/drivers/tty/serial/
Daltera_uart.c102 struct altera_uart *pp = container_of(port, struct altera_uart, port); in altera_uart_get_mctrl() local
107 sigs |= (pp->sigs & TIOCM_RTS); in altera_uart_get_mctrl()
112 static void altera_uart_update_ctrl_reg(struct altera_uart *pp) in altera_uart_update_ctrl_reg() argument
114 unsigned short imr = pp->imr; in altera_uart_update_ctrl_reg()
120 if (!pp->port.irq) in altera_uart_update_ctrl_reg()
123 altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG); in altera_uart_update_ctrl_reg()
128 struct altera_uart *pp = container_of(port, struct altera_uart, port); in altera_uart_set_mctrl() local
130 pp->sigs = sigs; in altera_uart_set_mctrl()
132 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK; in altera_uart_set_mctrl()
134 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK; in altera_uart_set_mctrl()
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/drivers/infiniband/core/
Dsecurity.c46 static struct pkey_index_qp_list *get_pkey_idx_qp_list(struct ib_port_pkey *pp) in get_pkey_idx_qp_list() argument
50 struct ib_device *dev = pp->sec->dev; in get_pkey_idx_qp_list()
52 spin_lock(&dev->port_data[pp->port_num].pkey_list_lock); in get_pkey_idx_qp_list()
53 list_for_each_entry (tmp_pkey, &dev->port_data[pp->port_num].pkey_list, in get_pkey_idx_qp_list()
55 if (tmp_pkey->pkey_index == pp->pkey_index) { in get_pkey_idx_qp_list()
60 spin_unlock(&dev->port_data[pp->port_num].pkey_list_lock); in get_pkey_idx_qp_list()
64 static int get_pkey_and_subnet_prefix(struct ib_port_pkey *pp, in get_pkey_and_subnet_prefix() argument
68 struct ib_device *dev = pp->sec->dev; in get_pkey_and_subnet_prefix()
71 ret = ib_get_cached_pkey(dev, pp->port_num, pp->pkey_index, pkey); in get_pkey_and_subnet_prefix()
75 ret = ib_get_cached_subnet_prefix(dev, pp->port_num, subnet_prefix); in get_pkey_and_subnet_prefix()
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/drivers/clk/at91/
Dsama7g5.c383 const char *pp[8]; member
393 .pp = { "syspll_divpmcck", "imgpll_divpmcck", "audiopll_divpmcck", },
401 .pp = { "audiopll_divpmcck", },
409 .pp = { "ddrpll_divpmcck", "imgpll_divpmcck", },
417 .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
425 .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
433 .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
441 .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
449 .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
457 .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
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