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Searched refs:pp_power_state (Results 1 – 19 of 19) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dpp_psm.c34 struct pp_power_state *state; in psm_init_power_state_table()
46 sizeof(struct pp_power_state); in psm_init_power_state_table()
88 state = (struct pp_power_state *)((unsigned long)state + size); in psm_init_power_state_table()
115 struct pp_power_state *state; in psm_get_ui_state()
127 state = (struct pp_power_state *)((unsigned long)state + hwmgr->ps_size); in psm_get_ui_state()
136 struct pp_power_state *state; in psm_get_state_by_classification()
148 state = (struct pp_power_state *)((unsigned long)state + hwmgr->ps_size); in psm_get_state_by_classification()
155 struct pp_power_state *state; in psm_set_states()
168 state = (struct pp_power_state *)((unsigned long)state + hwmgr->ps_size); in psm_set_states()
205 struct pp_power_state **state) in psm_set_user_performance_state()
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Dprocess_pptables_v1_0.h31 struct pp_power_state *power_state, int (*call_back_func)(struct pp_hwmgr *, void *,
32 struct pp_power_state *, void *, uint32_t));
Dpp_psm.h35 struct pp_power_state **state);
38 struct pp_power_state *new_ps);
Dprocesspptables.h29 struct pp_power_state;
44 struct pp_power_state *ps,
Dvega10_processpptables.h60 struct pp_power_state *power_state, int (*call_back_func)(struct pp_hwmgr *, void *,
61 struct pp_power_state *, void *, uint32_t));
Dvega12_processpptables.c357 uint32_t entry_index, struct pp_power_state *power_state,
359 struct pp_power_state *, void *, uint32_t))
Dhardwaremanager.c129 struct pp_power_state *adjusted_ps, in phm_apply_state_adjust_rules()
130 const struct pp_power_state *current_ps) in phm_apply_state_adjust_rules()
Dsmu10_hwmgr.c391 struct pp_power_state *prequest_ps, in smu10_apply_state_adjust_rules()
392 const struct pp_power_state *pcurrent_ps) in smu10_apply_state_adjust_rules()
837 unsigned long entry, struct pp_power_state *ps) in smu10_dpm_get_pp_table_entry()
Dsmu8_hwmgr.c1051 struct pp_power_state *prequest_ps, in smu8_apply_state_adjust_rules()
1052 const struct pp_power_state *pcurrent_ps) in smu8_apply_state_adjust_rules()
1329 struct pp_power_state *ps; in smu8_dpm_get_sclk()
1403 unsigned long entry, struct pp_power_state *ps) in smu8_dpm_get_pp_table_entry()
Dsmu7_hwmgr.c2982 struct pp_power_state *request_ps, in smu7_apply_state_adjust_rules()
2983 const struct pp_power_state *current_ps) in smu7_apply_state_adjust_rules()
3114 struct pp_power_state *ps; in smu7_dpm_get_mclk()
3136 struct pp_power_state *ps; in smu7_dpm_get_sclk()
3217 void *state, struct pp_power_state *power_state, in smu7_get_pp_table_entry_callback_func_v1()
3315 unsigned long entry_index, struct pp_power_state *state) in smu7_get_pp_table_entry_v1()
3460 unsigned long entry_index, struct pp_power_state *state) in smu7_get_pp_table_entry_v0()
3567 unsigned long entry_index, struct pp_power_state *state) in smu7_get_pp_table_entry()
4698 struct pp_power_state *ps; in smu7_set_sclk_od()
4740 struct pp_power_state *ps; in smu7_set_mclk_od()
Dvega10_hwmgr.c3091 void *state, struct pp_power_state *power_state, in vega10_get_pp_table_entry_callback_func()
3198 unsigned long entry_index, struct pp_power_state *state) in vega10_get_pp_table_entry()
3231 struct pp_power_state *request_ps, in vega10_apply_state_adjust_rules()
3232 const struct pp_power_state *current_ps) in vega10_apply_state_adjust_rules()
3830 struct pp_power_state *ps; in vega10_dpm_get_sclk()
3852 struct pp_power_state *ps; in vega10_dpm_get_mclk()
4944 struct pp_power_state *ps; in vega10_set_sclk_od()
4995 struct pp_power_state *ps; in vega10_set_mclk_od()
5225 struct pp_power_state *ps = hwmgr->request_ps; in vega10_odn_update_power_state()
5259 ps = (struct pp_power_state *)((unsigned long)(hwmgr->ps) + hwmgr->ps_size * (hwmgr->num_ps - 1)); in vega10_odn_update_power_state()
Dhwmgr.c387 struct pp_power_state *requested_ps = NULL; in hwmgr_handle_task()
Dprocess_pptables_v1_0.c1287 uint32_t entry_index, struct pp_power_state *power_state, in get_powerplay_table_entry_v1_0() argument
1289 struct pp_power_state *, void *, uint32_t)) in get_powerplay_table_entry_v1_0()
Dvega10_processpptables.c1330 uint32_t entry_index, struct pp_power_state *power_state, in vega10_get_powerplay_table_entry() argument
1332 struct pp_power_state *, void *, uint32_t)) in vega10_get_powerplay_table_entry()
Dprocesspptables.c681 struct pp_power_state *ps, in init_non_clock_fields()
889 struct pp_power_state *ps, in pp_tables_get_entry()
/drivers/gpu/drm/amd/pm/inc/
Dpower_state.h30 struct pp_power_state;
41 struct pp_power_state *next;
42 struct pp_power_state *prev;
150 struct pp_power_state { struct
Dhwmgr.h242 struct pp_power_state *prequest_ps,
243 const struct pp_power_state *pcurrent_ps);
259 unsigned long, struct pp_power_state *);
783 struct pp_power_state *ps;
792 struct pp_power_state *current_ps;
793 struct pp_power_state *request_ps;
794 struct pp_power_state *boot_ps;
795 struct pp_power_state *uvd_ps;
Dhardwaremanager.h30 struct pp_power_state;
411 struct pp_power_state *adjusted_ps,
412 const struct pp_power_state *current_ps);
/drivers/gpu/drm/amd/pm/powerplay/
Damd_powerplay.c470 struct pp_power_state *state; in pp_dpm_get_current_power_state()
624 struct pp_power_state *state = (struct pp_power_state *) in pp_dpm_get_pp_num_states()