Searched refs:pp_smu_status (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/ |
| D | dm_pp_smu.h | 60 enum pp_smu_status { enum
173 enum pp_smu_status (*set_display_count)(struct pp_smu *pp, int count);
178 enum pp_smu_status (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int Mhz);
184 enum pp_smu_status (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int Mhz);
189 enum pp_smu_status (*set_hard_min_uclk_by_freq)(struct pp_smu *pp, int Mhz);
194 enum pp_smu_status (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int Mhz);
197 enum pp_smu_status (*set_pme_wa_enable)(struct pp_smu *pp);
202 enum pp_smu_status (*set_voltage_by_freq)(struct pp_smu *pp,
217 enum pp_smu_status (*set_wm_ranges)(struct pp_smu *pp,
223 enum pp_smu_status (*get_maximum_sustainable_clocks)(struct pp_smu *pp,
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_pp_smu.c | 662 static enum pp_smu_status pp_nv_set_wm_ranges(struct pp_smu *pp, in pp_nv_set_wm_ranges()
673 enum pp_smu_status pp_nv_set_pme_wa_enable(struct pp_smu *pp) in pp_nv_set_pme_wa_enable()
689 static enum pp_smu_status pp_nv_set_display_count(struct pp_smu *pp, int count) in pp_nv_set_display_count()
705 static enum pp_smu_status
722 static enum pp_smu_status pp_nv_set_hard_min_dcefclk_by_freq( in pp_nv_set_hard_min_dcefclk_by_freq()
745 static enum pp_smu_status
768 static enum pp_smu_status pp_nv_set_pstate_handshake_support( in pp_nv_set_pstate_handshake_support()
781 static enum pp_smu_status pp_nv_set_voltage_by_freq(struct pp_smu *pp, in pp_nv_set_voltage_by_freq()
816 static enum pp_smu_status pp_nv_get_maximum_sustainable_clocks( in pp_nv_get_maximum_sustainable_clocks()
835 static enum pp_smu_status pp_nv_get_uclk_dpm_states(struct pp_smu *pp, in pp_nv_get_uclk_dpm_states()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| D | rn_clk_mgr.c | 849 enum pp_smu_status status = 0; in rn_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 1479 static enum pp_smu_status dummy_set_wm_ranges(struct pp_smu *pp, in dummy_set_wm_ranges()
1485 static enum pp_smu_status dummy_get_dpm_clock_table(struct pp_smu *pp, in dummy_get_dpm_clock_table()
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 3738 enum pp_smu_status status;
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