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Searched refs:pxlclk (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/arm/display/komeda/
Dkomeda_crtc.c50 u64 pxlclk, aclk; in komeda_crtc_update_clock_ratio() local
57 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; in komeda_crtc_update_clock_ratio()
60 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); in komeda_crtc_update_clock_ratio()
148 err = clk_set_rate(master->pxlclk, mode->crtc_clock * 1000); in komeda_crtc_prepare()
151 err = clk_prepare_enable(master->pxlclk); in komeda_crtc_prepare()
187 clk_disable_unprepare(master->pxlclk); in komeda_crtc_unprepare()
394 unsigned long pxlclk) in komeda_calc_min_aclk_rate() argument
400 return pxlclk * 2; in komeda_calc_min_aclk_rate()
402 return pxlclk; in komeda_calc_min_aclk_rate()
410 unsigned long pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000; in komeda_crtc_get_aclk() local
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Dkomeda_dev.c133 pipe->pxlclk = clk; in komeda_parse_pipe_dt()
Dkomeda_pipeline.c56 clk_put(pipe->pxlclk); in komeda_pipeline_destroy()
Dkomeda_pipeline.h393 struct clk *pxlclk; member
/drivers/gpu/drm/arm/
Dmalidp_crtc.c37 rate = clk_round_rate(hwdev->pxlclk, req_rate); in malidp_crtc_mode_valid()
62 clk_prepare_enable(hwdev->pxlclk); in malidp_crtc_atomic_enable()
65 clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000); in malidp_crtc_atomic_enable()
85 clk_disable_unprepare(hwdev->pxlclk); in malidp_crtc_atomic_disable()
Dmalidp_hw.c484 unsigned long pxlclk = vm->pixelclock; /* Hz */ in malidp500_se_calc_mclk() local
502 mclk = a * pxlclk / 10; in malidp500_se_calc_mclk()
825 unsigned long pxlclk = vm->pixelclock; in malidp550_se_calc_mclk() local
843 mclk = (pxlclk * numerator) / denominator; in malidp550_se_calc_mclk()
Dmalidp_drv.c745 hwdev->pxlclk = devm_clk_get(dev, "pxlclk"); in malidp_bind()
746 if (IS_ERR(hwdev->pxlclk)) in malidp_bind()
747 return PTR_ERR(hwdev->pxlclk); in malidp_bind()
Dmalidp_hw.h240 struct clk *pxlclk; member