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Searched refs:rFPGA0_XA_HSSIParameter2 (Results 1 – 12 of 12) sorted by relevance

/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c147 tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord); in phy_RFSerialRead_8723B()
149 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
156 tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord); in phy_RFSerialRead_8723B()
157 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEd… in phy_RFSerialRead_8723B()
158 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge… in phy_RFSerialRead_8723B()
402 …pHalData->PHYRegDef[ODM_RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parame… in phy_InitBBRFRegisterDefinition()
/drivers/staging/rtl8192u/
Dr819xU_phyreg.h11 #define rFPGA0_XA_HSSIParameter2 0x824 macro
Dr819xU_phy.c615 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; in rtl8192_InitBBRFRegDef()
816 rFPGA0_XA_HSSIParameter2, in rtl8192_BB_Config_ParaFile()
/drivers/staging/rtl8188eu/include/
Dhal8188e_phy_reg.h24 #define rFPGA0_XA_HSSIParameter2 0x824 macro
/drivers/staging/rtl8712/
Drtl871x_mp.c422 set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); in r8712_SwitchAntenna()
429 set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); in r8712_SwitchAntenna()
436 set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); in r8712_SwitchAntenna()
Drtl871x_mp_phy_regdef.h94 #define rFPGA0_XA_HSSIParameter2 0x824 macro
/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c608 reg[RF_PATH_A]->rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; in rtl88e_phy_init_bb_rf_register_definition()
Dphy.c63 tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord); in rf_serial_read()
73 phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord, in rf_serial_read()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h54 #define rFPGA0_XA_HSSIParameter2 0x824 macro
Dr8192E_phy.c422 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; in _rtl92e_init_bb_rf_reg_def()
Dr8192E_dev.c1501 rFPGA0_XA_HSSIParameter2, in _rtl92e_query_rxphystatus()
/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h103 #define rFPGA0_XA_HSSIParameter2 0x824 macro