Home
last modified time | relevance | path

Searched refs:rFPGA0_XB_HSSIParameter1 (Results 1 – 10 of 10) sorted by relevance

/drivers/staging/rtl8192u/
Dr819xU_phyreg.h12 #define rFPGA0_XB_HSSIParameter1 0x828 macro
Dr819xU_phy.c609 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; in rtl8192_InitBBRFRegDef()
/drivers/staging/rtl8188eu/include/
Dhal8188e_phy_reg.h25 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c606 reg[RF_PATH_B]->rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; in rtl88e_phy_init_bb_rf_register_definition()
Dphy.c85 rfpi_enable = (u8)phy_query_bb_reg(adapt, rFPGA0_XB_HSSIParameter1, BIT(8)); in rf_serial_read()
872 phy_set_bb_reg(adapt, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); in pi_mode_switch()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h55 #define rFPGA0_XB_HSSIParameter1 0x828 macro
Dr8192E_phy.c418 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; in _rtl92e_init_bb_rf_reg_def()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h95 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h104 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c169 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()