Searched refs:rFPGA0_XCD_RFInterfaceSW (Results 1 – 9 of 9) sorted by relevance
| /drivers/staging/rtl8192u/ |
| D | r819xU_phyreg.h | 29 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
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| D | r819xU_phy.c | 553 priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
555 priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
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| /drivers/staging/rtl8188eu/include/ |
| D | hal8188e_phy_reg.h | 38 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phyreg.h | 74 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
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| D | r8192E_phy.c | 384 priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
385 priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
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| /drivers/staging/rtl8712/ |
| D | rtl871x_mp_phy_regdef.h | 117 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
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| /drivers/staging/rtl8723bs/include/ |
| D | Hal8192CPhyReg.h | 130 #define rFPGA0_XCD_RFInterfaceSW 0x874 macro
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| /drivers/staging/rtl8188eu/hal/ |
| D | phy.c | 972 rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, in phy_iq_calibrate()
1008 phy_set_bb_reg(adapt, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); in phy_iq_calibrate()
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| /drivers/staging/rtl8723bs/hal/ |
| D | HalPhyRf_8723B.c | 1532 rFPGA0_XCD_RFInterfaceSW, in phy_IQCalibrate_8723B()
1576 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); in phy_IQCalibrate_8723B()
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