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Searched refs:reg_vals (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dsc.c33 static void dsc_init_reg_values(struct dsc_reg_values *reg_vals);
34 static void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parame…
35 …c_write_to_registers(struct display_stream_compressor *dsc, const struct dsc_reg_values *reg_vals);
176 return dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, &dsc_optc_cfg); in dsc2_validate_stream()
200 is_config_ok = dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, dsc_optc_cfg); in dsc2_set_config()
203 dsc_log_pps(dsc, &dsc20->reg_vals.pps); in dsc2_set_config()
204 dsc_write_to_registers(dsc, &dsc20->reg_vals); in dsc2_set_config()
473 static void dsc_init_reg_values(struct dsc_reg_values *reg_vals) in dsc_init_reg_values() argument
477 memset(reg_vals, 0, sizeof(struct dsc_reg_values)); in dsc_init_reg_values()
480 reg_vals->dsc_clock_enable = 1; in dsc_init_reg_values()
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Ddcn20_dsc.h548 struct dsc_reg_values reg_vals; member
/drivers/media/dvb-frontends/
Dts2020.c95 static const struct ts2020_reg_val reg_vals[] = { in ts2020_init() local
137 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) in ts2020_init()
138 regmap_write(priv->regmap, reg_vals[i].reg, in ts2020_init()
139 reg_vals[i].val); in ts2020_init()
/drivers/media/tuners/
Dm88rs6000t.c588 static const struct m88rs6000t_reg_val reg_vals[] = { in m88rs6000t_probe() local
680 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) { in m88rs6000t_probe()
682 reg_vals[i].reg, reg_vals[i].val); in m88rs6000t_probe()
/drivers/infiniband/hw/qib/
Dqib_sd7220.c974 uint8_t reg_vals[NUM_DDS_REGS]; member
1076 data = dds_init_vals[midx].reg_vals[idx]; in qib_sd_setvals()
1201 data = ddi->reg_vals[idx]; in set_dds_vals()