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Searched refs:reg_width (Results 1 – 25 of 26) sorted by relevance

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/drivers/reset/
Dreset-stm32mp1.c31 int reg_width = sizeof(u32); in stm32_reset_update() local
32 int bank = id / (reg_width * BITS_PER_BYTE); in stm32_reset_update()
33 int offset = id % (reg_width * BITS_PER_BYTE); in stm32_reset_update()
36 addr = data->membase + (bank * reg_width); in stm32_reset_update()
61 int reg_width = sizeof(u32); in stm32_reset_status() local
62 int bank = id / (reg_width * BITS_PER_BYTE); in stm32_reset_status()
63 int offset = id % (reg_width * BITS_PER_BYTE); in stm32_reset_status()
66 reg = readl(data->membase + (bank * reg_width)); in stm32_reset_status()
Dreset-simple.c35 int reg_width = sizeof(u32); in reset_simple_update() local
36 int bank = id / (reg_width * BITS_PER_BYTE); in reset_simple_update()
37 int offset = id % (reg_width * BITS_PER_BYTE); in reset_simple_update()
43 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
48 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update()
89 int reg_width = sizeof(u32); in reset_simple_status() local
90 int bank = id / (reg_width * BITS_PER_BYTE); in reset_simple_status()
91 int offset = id % (reg_width * BITS_PER_BYTE); in reset_simple_status()
94 reg = readl(data->membase + (bank * reg_width)); in reset_simple_status()
/drivers/sh/intc/
Dhandle.c73 fn += (mr->reg_width >> 3) - 1; in _intc_mask_data()
78 (mr->reg_width - 1) - *fld_idx); in _intc_mask_data()
137 fn += (pr->reg_width >> 3) - 1; in _intc_prio_data()
140 BUG_ON(n * pr->field_width > pr->reg_width); in _intc_prio_data()
142 bit = pr->reg_width - (n * pr->field_width); in _intc_prio_data()
194 fn += (mr->reg_width >> 3) - 1; in intc_ack_data()
199 (mr->reg_width - 1) - j); in intc_ack_data()
272 fn += (sr->reg_width >> 3) - 1; in intc_get_sense_handle()
274 BUG_ON((j + 1) * sr->field_width > sr->reg_width); in intc_get_sense_handle()
276 bit = sr->reg_width - ((j + 1) * sr->field_width); in intc_get_sense_handle()
Dbalancing.c67 fn += (mr->reg_width >> 3) - 1; in intc_dist_data()
72 (mr->reg_width - 1) - j); in intc_dist_data()
Dvirq.c139 unsigned int fn = REG_FN_TEST_BASE + (subgroup->reg_width >> 3) - 1; in intc_subgroup_data()
142 0, 1, (subgroup->reg_width - 1) - index); in intc_subgroup_data()
/drivers/net/wireless/broadcom/b43/
Dbus.c64 size_t count, u16 offset, u8 reg_width) in b43_bus_bcma_block_read() argument
66 bcma_block_read(dev->bdev, buffer, count, offset, reg_width); in b43_bus_bcma_block_read()
70 size_t count, u16 offset, u8 reg_width) in b43_bus_bcma_block_write() argument
72 bcma_block_write(dev->bdev, buffer, count, offset, reg_width); in b43_bus_bcma_block_write()
167 size_t count, u16 offset, u8 reg_width) in b43_bus_ssb_block_read() argument
169 ssb_block_read(dev->sdev, buffer, count, offset, reg_width); in b43_bus_ssb_block_read()
173 size_t count, u16 offset, u8 reg_width) in b43_bus_ssb_block_write() argument
175 ssb_block_write(dev->sdev, buffer, count, offset, reg_width); in b43_bus_ssb_block_write()
Dbus.h34 size_t count, u16 offset, u8 reg_width);
36 size_t count, u16 offset, u8 reg_width);
Db43.h1069 size_t count, u16 offset, u8 reg_width) in b43_block_read() argument
1071 dev->dev->block_read(dev->dev, buffer, count, offset, reg_width); in b43_block_read()
1075 size_t count, u16 offset, u8 reg_width) in b43_block_write() argument
1077 dev->dev->block_write(dev->dev, buffer, count, offset, reg_width); in b43_block_write()
/drivers/pinctrl/renesas/
Dgpio.c61 return sh_pfc_read_raw_reg(mem, dreg->reg_width); in gpio_read_data_reg()
70 sh_pfc_write_raw_reg(mem, dreg->reg_width, value); in gpio_write_data_reg()
82 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_reg()
83 for (bit = 0; bit < dreg->reg_width; bit++) { in gpio_setup_data_reg()
104 for (i = 0; pfc->info->data_regs[i].reg_width; ++i) in gpio_setup_data_regs()
112 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_regs()
156 pos = reg->info->reg_width - (bit + 1); in gpio_pin_set_value()
188 pos = reg->info->reg_width - (bit + 1); in gpio_pin_get()
Dcore.c139 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width) in sh_pfc_read_raw_reg() argument
141 switch (reg_width) { in sh_pfc_read_raw_reg()
154 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, in sh_pfc_write_raw_reg() argument
157 switch (reg_width) { in sh_pfc_write_raw_reg()
199 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width); in sh_pfc_config_reg_helper()
202 *posp = crp->reg_width; in sh_pfc_config_reg_helper()
220 crp->reg, value, field, crp->reg_width, hweight32(mask)); in sh_pfc_write_config_reg()
225 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width); in sh_pfc_write_config_reg()
234 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data); in sh_pfc_write_config_reg()
246 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
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Dcore.h23 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
24 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
Dsh_pfc.h117 u8 reg_width, field_width; member
142 .reg = r, .reg_width = r_width, \
162 .reg = r, .reg_width = r_width, \
199 u8 reg_width; member
212 .reg = r, .reg_width = r_width + \
/drivers/ssb/
Dhost_soc.c42 size_t count, u16 offset, u8 reg_width) in ssb_host_soc_block_read() argument
50 switch (reg_width) { in ssb_host_soc_block_read()
115 size_t count, u16 offset, u8 reg_width) in ssb_host_soc_block_write() argument
123 switch (reg_width) { in ssb_host_soc_block_write()
Dsdio.c298 size_t count, u16 offset, u8 reg_width) in ssb_sdio_block_read() argument
313 switch (reg_width) { in ssb_sdio_block_read()
337 bus->sdio_sbaddr >> 16, offset, reg_width, saved_count, error); in ssb_sdio_block_read()
405 size_t count, u16 offset, u8 reg_width) in ssb_sdio_block_write() argument
419 switch (reg_width) { in ssb_sdio_block_write()
443 bus->sdio_sbaddr >> 16, offset, reg_width, saved_count, error); in ssb_sdio_block_write()
Dpcmcia.c275 size_t count, u16 offset, u8 reg_width) in ssb_pcmcia_block_read() argument
288 switch (reg_width) { in ssb_pcmcia_block_read()
374 size_t count, u16 offset, u8 reg_width) in ssb_pcmcia_block_write() argument
385 switch (reg_width) { in ssb_pcmcia_block_write()
Dpci.c1003 size_t count, u16 offset, u8 reg_width) in ssb_pci_block_read() argument
1014 switch (reg_width) { in ssb_pci_block_read()
1077 size_t count, u16 offset, u8 reg_width) in ssb_pci_block_write() argument
1088 switch (reg_width) { in ssb_pci_block_write()
/drivers/bcma/
Dhost_soc.c51 size_t count, u16 offset, u8 reg_width) in bcma_host_soc_block_read() argument
55 switch (reg_width) { in bcma_host_soc_block_read()
95 size_t count, u16 offset, u8 reg_width) in bcma_host_soc_block_write() argument
99 switch (reg_width) { in bcma_host_soc_block_write()
Dhost_pci.c83 size_t count, u16 offset, u8 reg_width) in bcma_host_pci_block_read() argument
88 switch (reg_width) { in bcma_host_pci_block_read()
107 u16 offset, u8 reg_width) in bcma_host_pci_block_write() argument
112 switch (reg_width) { in bcma_host_pci_block_write()
/drivers/dma/
Dat_hdmac.c1037 unsigned int reg_width; in atc_prep_slave_sg() local
1059 reg_width = convert_buswidth(sconfig->dst_addr_width); in atc_prep_slave_sg()
1060 ctrla |= ATC_DST_WIDTH(reg_width); in atc_prep_slave_sg()
1099 reg_width = convert_buswidth(sconfig->src_addr_width); in atc_prep_slave_sg()
1100 ctrla |= ATC_SRC_WIDTH(reg_width); in atc_prep_slave_sg()
1131 | len >> reg_width; in atc_prep_slave_sg()
1167 atc_dma_cyclic_check_values(unsigned int reg_width, dma_addr_t buf_addr, in atc_dma_cyclic_check_values() argument
1170 if (period_len > (ATC_BTSIZE_MAX << reg_width)) in atc_dma_cyclic_check_values()
1172 if (unlikely(period_len & ((1 << reg_width) - 1))) in atc_dma_cyclic_check_values()
1174 if (unlikely(buf_addr & ((1 << reg_width) - 1))) in atc_dma_cyclic_check_values()
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Dtxx9dmac.c352 sai = ds->reg_width; in txx9dmac_dostart()
356 dai = ds->reg_width; in txx9dmac_dostart()
373 sai = ds->reg_width; in txx9dmac_dostart()
377 dai = ds->reg_width; in txx9dmac_dostart()
817 BUG_ON(!ds || !ds->reg_width); in txx9dmac_prep_slave_sg()
860 sai = ds->reg_width; in txx9dmac_prep_slave_sg()
864 dai = ds->reg_width; in txx9dmac_prep_slave_sg()
1014 TXX9_DMA_CCR_XFSZ(__ffs(ds->reg_width)); in txx9dmac_alloc_chan_resources()
/drivers/gpio/
Dgpio-htc-egpio.c295 if ((pdata->reg_width != 8) && (pdata->reg_width != 16)) in egpio_probe()
298 ei->reg_shift = fls(pdata->reg_width - 1); in egpio_probe()
301 ei->reg_mask = (1 << pdata->reg_width) - 1; in egpio_probe()
/drivers/pwm/
Dpwm-mediatek.c125 u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH, in pwm_mediatek_config() local
158 reg_width = PWM45DWIDTH_FIXUP; in pwm_mediatek_config()
164 pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period); in pwm_mediatek_config()
/drivers/scsi/qla2xxx/
Dqla_tmpl.h84 uint8_t reg_width; member
98 uint8_t reg_width; member
/drivers/net/ethernet/netronome/nfp/
Dnfp_net_debugdump.c218 u32 reg_width; in nfp_csr_spec_valid() local
223 reg_width = be32_to_cpu(spec_csr->register_width); in nfp_csr_spec_valid()
225 return reg_width == 32 || reg_width == 64; in nfp_csr_spec_valid()
/drivers/dma/dw/
Dcore.c630 unsigned int reg_width; in dwc_prep_slave_sg() local
648 reg_width = __ffs(sconfig->dst_addr_width); in dwc_prep_slave_sg()
651 | DWC_CTLL_DST_WIDTH(reg_width) in dwc_prep_slave_sg()
698 reg_width = __ffs(sconfig->src_addr_width); in dwc_prep_slave_sg()
701 | DWC_CTLL_SRC_WIDTH(reg_width) in dwc_prep_slave_sg()
721 ctlhi = dw->bytes2block(dwc, len, reg_width, &dlen); in dwc_prep_slave_sg()

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