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Searched refs:reset_level (Results 1 – 11 of 11) sorted by relevance

/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_err.c8 .reset_level = HNAE3_NONE_RESET },
10 .reset_level = HNAE3_NONE_RESET },
12 .reset_level = HNAE3_NONE_RESET },
14 .reset_level = HNAE3_NONE_RESET },
16 .reset_level = HNAE3_NONE_RESET },
18 .reset_level = HNAE3_NONE_RESET },
20 .reset_level = HNAE3_NONE_RESET },
22 .reset_level = HNAE3_NONE_RESET },
24 .reset_level = HNAE3_NONE_RESET },
30 .reset_level = HNAE3_NONE_RESET },
[all …]
Dhclge_err.h126 enum hnae3_reset_type reset_level; member
Dhclge_main.c3861 enum hnae3_reset_type reset_level; in hclge_reset_rebuild() local
3909 reset_level = hclge_get_reset_level(ae_dev, in hclge_reset_rebuild()
3911 if (reset_level != HNAE3_NONE_RESET) in hclge_reset_rebuild()
3912 set_bit(reset_level, &hdev->reset_request); in hclge_reset_rebuild()
3963 hdev->reset_level = in hclge_reset_event()
3967 hdev->reset_level = HNAE3_FUNC_RESET; in hclge_reset_event()
3971 hdev->reset_level); in hclge_reset_event()
3974 set_bit(hdev->reset_level, &hdev->reset_request); in hclge_reset_event()
3977 if (hdev->reset_level < HNAE3_GLOBAL_RESET) in hclge_reset_event()
3978 hdev->reset_level++; in hclge_reset_event()
[all …]
Dhclge_main.h734 enum hnae3_reset_type reset_level; member
/drivers/net/ethernet/mellanox/mlx5/core/
Dfw_reset.c45 static int mlx5_reg_mfrl_set(struct mlx5_core_dev *dev, u8 reset_level, in mlx5_reg_mfrl_set() argument
51 MLX5_SET(mfrl_reg, in, reset_level, reset_level); in mlx5_reg_mfrl_set()
59 static int mlx5_reg_mfrl_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type) in mlx5_reg_mfrl_query() argument
69 if (reset_level) in mlx5_reg_mfrl_query()
70 *reset_level = MLX5_GET(mfrl_reg, out, reset_level); in mlx5_reg_mfrl_query()
77 int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type) in mlx5_fw_reset_query() argument
79 return mlx5_reg_mfrl_query(dev, reset_level, reset_type); in mlx5_fw_reset_query()
Ddevlink.c91 u8 reset_level, reset_type, net_port_alive; in mlx5_devlink_reload_fw_activate() local
94 err = mlx5_fw_reset_query(dev, &reset_level, &reset_type); in mlx5_devlink_reload_fw_activate()
97 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL3)) { in mlx5_devlink_reload_fw_activate()
118 u8 reset_level; in mlx5_devlink_trigger_fw_live_patch() local
121 err = mlx5_fw_reset_query(dev, &reset_level, NULL); in mlx5_devlink_trigger_fw_live_patch()
124 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL0)) { in mlx5_devlink_trigger_fw_live_patch()
Dfw_reset.h11 int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type);
/drivers/net/ethernet/intel/i40e/
Di40e_client.c26 u32 reset_level);
648 u32 reset_level) in i40e_client_request_reset() argument
652 switch (reset_level) { in i40e_client_request_reset()
662 pf->hw.pf_id, reset_level); in i40e_client_request_reset()
/drivers/net/ethernet/hisilicon/hns3/hns3vf/
Dhclgevf_main.h274 enum hnae3_reset_type reset_level; member
Dhclgevf_main.c2023 hdev->reset_level = in hclgevf_reset_event()
2027 hdev->reset_level = HNAE3_VF_FUNC_RESET; in hclgevf_reset_event()
2204 set_bit(hdev->reset_level, &hdev->reset_pending); in hclgevf_reset_service_task()
3224 hdev->reset_level = HNAE3_VF_FUNC_RESET; in hclgevf_init_hdev()
/drivers/soc/tegra/
Dpmc.c1923 static DEVICE_ATTR_RO(reset_level);