| /drivers/spi/ |
| D | spi-sprd.c | 169 int (*read_bufs)(struct sprd_spi *ss, u32 len);
170 int (*write_bufs)(struct sprd_spi *ss, u32 len);
173 static u32 sprd_spi_transfer_max_timeout(struct sprd_spi *ss, in sprd_spi_transfer_max_timeout() argument
181 u32 bit_time_us = DIV_ROUND_UP(USEC_PER_SEC, ss->hw_speed_hz); in sprd_spi_transfer_max_timeout()
187 u32 interval_cycle = SPRD_SPI_FIFO_SIZE * ss->word_delay; in sprd_spi_transfer_max_timeout()
189 ss->src_clk); in sprd_spi_transfer_max_timeout()
194 static int sprd_spi_wait_for_tx_end(struct sprd_spi *ss, struct spi_transfer *t) in sprd_spi_wait_for_tx_end() argument
199 us = sprd_spi_transfer_max_timeout(ss, t); in sprd_spi_wait_for_tx_end()
200 ret = readl_relaxed_poll_timeout(ss->base + SPRD_SPI_INT_RAW_STS, val, in sprd_spi_wait_for_tx_end()
203 dev_err(ss->dev, "SPI error, spi send timeout!\n"); in sprd_spi_wait_for_tx_end()
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| D | spi-sh.c | 84 static void spi_sh_write(struct spi_sh_data *ss, unsigned long data, in spi_sh_write() argument
87 if (ss->width == 8) in spi_sh_write()
88 iowrite8(data, ss->addr + (offset >> 2)); in spi_sh_write()
89 else if (ss->width == 32) in spi_sh_write()
90 iowrite32(data, ss->addr + offset); in spi_sh_write()
93 static unsigned long spi_sh_read(struct spi_sh_data *ss, unsigned long offset) in spi_sh_read() argument
95 if (ss->width == 8) in spi_sh_read()
96 return ioread8(ss->addr + (offset >> 2)); in spi_sh_read()
97 else if (ss->width == 32) in spi_sh_read()
98 return ioread32(ss->addr + offset); in spi_sh_read()
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| /drivers/crypto/allwinner/sun8i-ss/ |
| D | sun8i-ss-core.c | 60 int sun8i_ss_get_engine_number(struct sun8i_ss_dev *ss) in sun8i_ss_get_engine_number() argument
62 return atomic_inc_return(&ss->flow) % MAXFLOW; in sun8i_ss_get_engine_number()
65 int sun8i_ss_run_task(struct sun8i_ss_dev *ss, struct sun8i_cipher_req_ctx *rctx, in sun8i_ss_run_task() argument
74 ss->flows[flow].stat_req++; in sun8i_ss_run_task()
105 mutex_lock(&ss->mlock); in sun8i_ss_run_task()
106 writel(rctx->p_key, ss->base + SS_KEY_ADR_REG); in sun8i_ss_run_task()
111 writel(rctx->p_iv[0], ss->base + SS_IV_ADR_REG); in sun8i_ss_run_task()
113 writel(rctx->t_dst[i - 1].addr + rctx->t_dst[i - 1].len * 4 - ivlen, ss->base + SS_IV_ADR_REG); in sun8i_ss_run_task()
115 writel(rctx->p_iv[i], ss->base + SS_IV_ADR_REG); in sun8i_ss_run_task()
119 dev_dbg(ss->dev, in sun8i_ss_run_task()
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| D | sun8i-ss-prng.c | 63 struct sun8i_ss_dev *ss; in sun8i_ss_prng_generate() local
72 ss = algt->ss; in sun8i_ss_prng_generate()
75 dev_err(ss->dev, "The PRNG is not seeded\n"); in sun8i_ss_prng_generate()
90 flow = sun8i_ss_get_engine_number(ss); in sun8i_ss_prng_generate()
103 dma_iv = dma_map_single(ss->dev, ctx->seed, ctx->slen, DMA_TO_DEVICE); in sun8i_ss_prng_generate()
104 if (dma_mapping_error(ss->dev, dma_iv)) { in sun8i_ss_prng_generate()
105 dev_err(ss->dev, "Cannot DMA MAP IV\n"); in sun8i_ss_prng_generate()
110 dma_dst = dma_map_single(ss->dev, d, todo, DMA_FROM_DEVICE); in sun8i_ss_prng_generate()
111 if (dma_mapping_error(ss->dev, dma_dst)) { in sun8i_ss_prng_generate()
112 dev_err(ss->dev, "Cannot DMA MAP DST\n"); in sun8i_ss_prng_generate()
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| D | sun8i-ss-cipher.c | 100 struct sun8i_ss_dev *ss = op->ss; in sun8i_ss_setup_ivs() local
106 struct sun8i_ss_flow *sf = &ss->flows[rctx->flow]; in sun8i_ss_setup_ivs()
126 a = dma_map_single(ss->dev, sf->iv[i], ivsize, DMA_TO_DEVICE); in sun8i_ss_setup_ivs()
127 if (dma_mapping_error(ss->dev, a)) { in sun8i_ss_setup_ivs()
129 dev_err(ss->dev, "Cannot DMA MAP IV\n"); in sun8i_ss_setup_ivs()
152 dma_unmap_single(ss->dev, rctx->p_iv[i], ivsize, DMA_TO_DEVICE); in sun8i_ss_setup_ivs()
163 struct sun8i_ss_dev *ss = op->ss; in sun8i_ss_cipher() local
167 struct sun8i_ss_flow *sf = &ss->flows[rctx->flow]; in sun8i_ss_cipher()
177 dev_dbg(ss->dev, "%s %s %u %x IV(%p %u) key=%u\n", __func__, in sun8i_ss_cipher()
187 rctx->op_mode = ss->variant->op_mode[algt->ss_blockmode]; in sun8i_ss_cipher()
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| D | sun8i-ss-hash.c | 31 op->ss = algt->ss; in sun8i_ss_hash_crainit()
41 dev_err(algt->ss->dev, "Fallback driver could no be loaded\n"); in sun8i_ss_hash_crainit()
52 dev_info(op->ss->dev, "Fallback for %s is %s\n", in sun8i_ss_hash_crainit()
55 err = pm_runtime_get_sync(op->ss->dev); in sun8i_ss_hash_crainit()
60 pm_runtime_put_noidle(op->ss->dev); in sun8i_ss_hash_crainit()
70 pm_runtime_put_sync_suspend(tfmctx->ss->dev); in sun8i_ss_hash_craexit()
199 static int sun8i_ss_run_hash_task(struct sun8i_ss_dev *ss, in sun8i_ss_run_hash_task() argument
208 ss->flows[flow].stat_req++; in sun8i_ss_run_hash_task()
223 mutex_lock(&ss->mlock); in sun8i_ss_run_hash_task()
226 writel(rctx->t_dst[i - 1].addr, ss->base + SS_KEY_ADR_REG); in sun8i_ss_run_hash_task()
[all …]
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| D | Makefile | 1 obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
2 sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
3 sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
4 sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_HASH) += sun8i-ss-hash.o
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| /drivers/gpu/drm/imx/dcss/ |
| D | dcss-ss.c | 73 static void dcss_ss_write(struct dcss_ss *ss, u32 val, u32 ofs) in dcss_ss_write() argument
75 if (!ss->in_use) in dcss_ss_write()
76 dcss_writel(val, ss->base_reg + ofs); in dcss_ss_write()
78 dcss_ctxld_write(ss->ctxld, ss->ctx_id, val, in dcss_ss_write()
79 ss->base_ofs + ofs); in dcss_ss_write()
84 struct dcss_ss *ss; in dcss_ss_init() local
86 ss = kzalloc(sizeof(*ss), GFP_KERNEL); in dcss_ss_init()
87 if (!ss) in dcss_ss_init()
90 dcss->ss = ss; in dcss_ss_init()
91 ss->dev = dcss->dev; in dcss_ss_init()
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| /drivers/usb/gadget/function/ |
| D | f_sourcesink.c | 320 struct f_sourcesink *ss = func_to_ss(f); in sourcesink_bind() local
332 ss->in_ep = usb_ep_autoconfig(cdev->gadget, &fs_source_desc); in sourcesink_bind()
333 if (!ss->in_ep) { in sourcesink_bind()
340 ss->out_ep = usb_ep_autoconfig(cdev->gadget, &fs_sink_desc); in sourcesink_bind()
341 if (!ss->out_ep) in sourcesink_bind()
345 if (ss->isoc_interval < 1) in sourcesink_bind()
346 ss->isoc_interval = 1; in sourcesink_bind()
347 if (ss->isoc_interval > 16) in sourcesink_bind()
348 ss->isoc_interval = 16; in sourcesink_bind()
349 if (ss->isoc_mult > 2) in sourcesink_bind()
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| /drivers/net/ethernet/mediatek/ |
| D | mtk_sgmii.c | 16 int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *r, u32 ana_rgc3) in mtk_sgmii_init() argument
21 ss->ana_rgc3 = ana_rgc3; in mtk_sgmii_init()
28 ss->regmap[i] = syscon_node_to_regmap(np); in mtk_sgmii_init()
30 if (IS_ERR(ss->regmap[i])) in mtk_sgmii_init()
31 return PTR_ERR(ss->regmap[i]); in mtk_sgmii_init()
37 int mtk_sgmii_setup_mode_an(struct mtk_sgmii *ss, int id) in mtk_sgmii_setup_mode_an() argument
41 if (!ss->regmap[id]) in mtk_sgmii_setup_mode_an()
45 regmap_write(ss->regmap[id], SGMSYS_PCS_LINK_TIMER, in mtk_sgmii_setup_mode_an()
48 regmap_read(ss->regmap[id], SGMSYS_SGMII_MODE, &val); in mtk_sgmii_setup_mode_an()
50 regmap_write(ss->regmap[id], SGMSYS_SGMII_MODE, val); in mtk_sgmii_setup_mode_an()
[all …]
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| /drivers/crypto/allwinner/sun4i-ss/ |
| D | sun4i-ss-core.c | 243 struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); in sun4i_ss_pm_suspend() local
245 if (ss->reset) in sun4i_ss_pm_suspend()
246 reset_control_assert(ss->reset); in sun4i_ss_pm_suspend()
248 clk_disable_unprepare(ss->ssclk); in sun4i_ss_pm_suspend()
249 clk_disable_unprepare(ss->busclk); in sun4i_ss_pm_suspend()
255 struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); in sun4i_ss_pm_resume() local
259 err = clk_prepare_enable(ss->busclk); in sun4i_ss_pm_resume()
261 dev_err(ss->dev, "Cannot prepare_enable busclk\n"); in sun4i_ss_pm_resume()
265 err = clk_prepare_enable(ss->ssclk); in sun4i_ss_pm_resume()
267 dev_err(ss->dev, "Cannot prepare_enable ssclk\n"); in sun4i_ss_pm_resume()
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| D | sun4i-ss-prng.c | 10 memcpy(algt->ss->seed, seed, slen); in sun4i_ss_prng_seed()
25 struct sun4i_ss_ctx *ss; in sun4i_ss_prng_generate() local
29 ss = algt->ss; in sun4i_ss_prng_generate()
31 err = pm_runtime_get_sync(ss->dev); in sun4i_ss_prng_generate()
35 spin_lock_bh(&ss->slock); in sun4i_ss_prng_generate()
37 writel(mode, ss->base + SS_CTL); in sun4i_ss_prng_generate()
42 writel(ss->seed[i], ss->base + SS_KEY0 + i * 4); in sun4i_ss_prng_generate()
46 readsl(ss->base + SS_TXFIFO, data, len / 4); in sun4i_ss_prng_generate()
52 v = readl(ss->base + SS_KEY0 + i * 4); in sun4i_ss_prng_generate()
53 ss->seed[i] = v; in sun4i_ss_prng_generate()
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| D | sun4i-ss-cipher.c | 19 struct sun4i_ss_ctx *ss = op->ss; in sun4i_ss_opti_poll() local
44 dev_err_ratelimited(ss->dev, "ERROR: Some SGs are NULL\n"); in sun4i_ss_opti_poll()
55 spin_lock_irqsave(&ss->slock, flags); in sun4i_ss_opti_poll()
58 writesl(ss->base + SS_KEY0 + i * 4, &op->key[i], 1); in sun4i_ss_opti_poll()
63 writesl(ss->base + SS_IV0 + i * 4, &v, 1); in sun4i_ss_opti_poll()
66 writel(mode, ss->base + SS_CTL); in sun4i_ss_opti_poll()
81 dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n"); in sun4i_ss_opti_poll()
89 writesl(ss->base + SS_RXFIFO, mi.addr + oi, todo); in sun4i_ss_opti_poll()
99 spaces = readl(ss->base + SS_FCSR); in sun4i_ss_opti_poll()
109 dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n"); in sun4i_ss_opti_poll()
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| D | sun4i-ss-hash.c | 28 op->ss = algt->ss; in sun4i_hash_crainit()
30 err = pm_runtime_get_sync(op->ss->dev); in sun4i_hash_crainit()
43 pm_runtime_put(op->ss->dev); in sun4i_hash_craexit()
195 struct sun4i_ss_ctx *ss = tfmctx->ss; in sun4i_hash() local
202 dev_dbg(ss->dev, "%s %s bc=%llu len=%u mode=%x wl=%u h0=%0x", in sun4i_hash()
212 dev_err(ss->dev, "Cannot process too large request\n"); in sun4i_hash()
224 spin_lock_bh(&ss->slock); in sun4i_hash()
233 writel(op->hash[i], ss->base + SS_IV0 + i * 4); in sun4i_hash()
236 writel(op->mode | SS_ENABLED | ivmode, ss->base + SS_CTL); in sun4i_hash()
246 dev_err(ss->dev, "ERROR: Bound error %u %u\n", in sun4i_hash()
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| D | Makefile | 2 obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sun4i-ss.o
3 sun4i-ss-y += sun4i-ss-core.o sun4i-ss-hash.o sun4i-ss-cipher.o
4 sun4i-ss-$(CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG) += sun4i-ss-prng.o
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| /drivers/net/ethernet/myricom/myri10ge/ |
| D | myri10ge.c | 197 struct myri10ge_slice_state *ss; member
915 struct myri10ge_slice_state *ss; in myri10ge_reset() local
943 bytes = mgp->max_intr_slots * sizeof(*mgp->ss[0].rx_done.entry); in myri10ge_reset()
1000 ss = &mgp->ss[i]; in myri10ge_reset()
1001 cmd.data0 = MYRI10GE_LOWPART_TO_U32(ss->rx_done.bus); in myri10ge_reset()
1002 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(ss->rx_done.bus); in myri10ge_reset()
1011 ss = &mgp->ss[i]; in myri10ge_reset()
1012 ss->irq_claim = in myri10ge_reset()
1032 ss = &mgp->ss[i]; in myri10ge_reset()
1034 ss->dca_tag = (__iomem __be32 *) in myri10ge_reset()
[all …]
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| /drivers/media/pci/solo6x10/ |
| D | solo6x10-g723.c | 80 struct snd_pcm_substream *ss; in solo_g723_isr() local
83 for (ss = pstr->substream; ss != NULL; ss = ss->next) { in solo_g723_isr()
84 if (snd_pcm_substream_chip(ss) == NULL) in solo_g723_isr()
88 if (snd_pcm_substream_chip(ss) == solo_dev) in solo_g723_isr()
92 solo_pcm = snd_pcm_substream_chip(ss); in solo_g723_isr()
96 snd_pcm_period_elapsed(ss); in solo_g723_isr()
118 static int snd_solo_pcm_open(struct snd_pcm_substream *ss) in snd_solo_pcm_open() argument
120 struct solo_dev *solo_dev = snd_pcm_substream_chip(ss); in snd_solo_pcm_open()
135 ss->runtime->hw = snd_solo_pcm_hw; in snd_solo_pcm_open()
137 snd_pcm_substream_chip(ss) = solo_pcm; in snd_solo_pcm_open()
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| /drivers/gpu/drm/i915/gt/ |
| D | intel_sseu_debugfs.c | 26 int ss; in cherryview_sseu_device_status() local
33 for (ss = 0; ss < ss_max; ss++) { in cherryview_sseu_device_status()
36 if (sig1[ss] & CHV_SS_PG_ENABLE) in cherryview_sseu_device_status()
41 sseu->subslice_mask[0] |= BIT(ss); in cherryview_sseu_device_status()
42 eu_cnt = ((sig1[ss] & CHV_EU08_PG_ENABLE) ? 0 : 2) + in cherryview_sseu_device_status()
43 ((sig1[ss] & CHV_EU19_PG_ENABLE) ? 0 : 2) + in cherryview_sseu_device_status()
44 ((sig1[ss] & CHV_EU210_PG_ENABLE) ? 0 : 2) + in cherryview_sseu_device_status()
45 ((sig2[ss] & CHV_EU311_PG_ENABLE) ? 0 : 2); in cherryview_sseu_device_status()
60 int s, ss; in gen10_sseu_device_status() local
94 for (ss = 0; ss < info->sseu.max_subslices; ss++) { in gen10_sseu_device_status()
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| D | intel_sseu.c | 107 int s, ss; in gen11_compute_sseu_info() local
121 for (ss = 0; ss < sseu->max_subslices; ss++) in gen11_compute_sseu_info()
122 if (intel_sseu_has_subslice(sseu, s, ss)) in gen11_compute_sseu_info()
123 sseu_set_eus(sseu, s, ss, eu_en); in gen11_compute_sseu_info()
199 int s, ss; in gen10_sseu_info_init() local
208 for (ss = 0; ss < sseu->max_subslices; ss++) in gen10_sseu_info_init()
209 sseu_set_eus(sseu, 0, ss, (eu_en >> (8 * ss)) & eu_mask); in gen10_sseu_info_init()
236 for (ss = 0; ss < sseu->max_subslices; ss++) { in gen10_sseu_info_init()
237 if (sseu_get_eus(sseu, s, ss) == 0) in gen10_sseu_info_init()
238 subslice_mask_with_eus &= ~BIT(ss); in gen10_sseu_info_init()
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| /drivers/media/pci/tw686x/ |
| D | tw686x-audio.c | 48 if (!ac->ss || !ac->curr_bufs[0] || !ac->curr_bufs[1]) { in tw686x_audio_irq()
77 snd_pcm_period_elapsed(ac->ss); in tw686x_audio_irq()
104 static int tw686x_pcm_open(struct snd_pcm_substream *ss) in tw686x_pcm_open() argument
106 struct tw686x_dev *dev = snd_pcm_substream_chip(ss); in tw686x_pcm_open()
107 struct tw686x_audio_channel *ac = &dev->audio_channels[ss->number]; in tw686x_pcm_open()
108 struct snd_pcm_runtime *rt = ss->runtime; in tw686x_pcm_open()
111 ac->ss = ss; in tw686x_pcm_open()
121 static int tw686x_pcm_close(struct snd_pcm_substream *ss) in tw686x_pcm_close() argument
123 struct tw686x_dev *dev = snd_pcm_substream_chip(ss); in tw686x_pcm_close()
124 struct tw686x_audio_channel *ac = &dev->audio_channels[ss->number]; in tw686x_pcm_close()
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| /drivers/infiniband/hw/qib/ |
| D | qib_sdma.c | 68 static void sdma_get(struct qib_sdma_state *ss) in sdma_get() argument
70 kref_get(&ss->kref); in sdma_get()
75 struct qib_sdma_state *ss = in sdma_complete() local
78 complete(&ss->comp); in sdma_complete()
81 static void sdma_put(struct qib_sdma_state *ss) in sdma_put() argument
83 kref_put(&ss->kref, sdma_complete); in sdma_put()
86 static void sdma_finalput(struct qib_sdma_state *ss) in sdma_finalput() argument
88 sdma_put(ss); in sdma_finalput()
89 wait_for_completion(&ss->comp); in sdma_finalput()
172 struct qib_sdma_state *ss = &ppd->sdma_state; in sdma_hw_start_up() local
[all …]
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| /drivers/ide/ |
| D | sc1200.c | 239 struct sc1200_saved_state *ss = host->host_priv; in sc1200_suspend() local
247 pci_read_config_dword(dev, 0x40 + r * 4, &ss->regs[r]); in sc1200_suspend()
258 struct sc1200_saved_state *ss = host->host_priv; in sc1200_resume() local
271 pci_write_config_dword(dev, 0x40 + r * 4, ss->regs[r]); in sc1200_resume()
308 struct sc1200_saved_state *ss = NULL; in sc1200_init_one() local
312 ss = kmalloc(sizeof(*ss), GFP_KERNEL); in sc1200_init_one()
313 if (ss == NULL) in sc1200_init_one()
316 rc = ide_pci_init_one(dev, &sc1200_chipset, ss); in sc1200_init_one()
318 kfree(ss); in sc1200_init_one()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | atombios_crtc.c | 245 struct amdgpu_atom_ss *ss) in amdgpu_atombios_crtc_program_ss() argument
257 if (ss->percentage == 0) in amdgpu_atombios_crtc_program_ss()
259 if (ss->type & ATOM_EXTERNAL_SS_MASK) in amdgpu_atombios_crtc_program_ss()
279 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in amdgpu_atombios_crtc_program_ss()
293 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in amdgpu_atombios_crtc_program_ss()
294 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); in amdgpu_atombios_crtc_program_ss()
340 if (amdgpu_crtc->ss.refdiv) { in amdgpu_atombios_crtc_adjust_pll()
342 amdgpu_crtc->pll_reference_div = amdgpu_crtc->ss.refdiv; in amdgpu_atombios_crtc_adjust_pll()
394 if (amdgpu_crtc->ss_enabled && amdgpu_crtc->ss.percentage) in amdgpu_atombios_crtc_adjust_pll()
407 if (amdgpu_crtc->ss_enabled && amdgpu_crtc->ss.percentage) in amdgpu_atombios_crtc_adjust_pll()
[all …]
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| /drivers/gpu/drm/radeon/ |
| D | atombios_crtc.c | 447 struct radeon_atom_ss *ss) in atombios_crtc_program_ss() argument
459 if (ss->percentage == 0) in atombios_crtc_program_ss()
461 if (ss->type & ATOM_EXTERNAL_SS_MASK) in atombios_crtc_program_ss()
482 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
496 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in atombios_crtc_program_ss()
497 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); in atombios_crtc_program_ss()
500 args.v2.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); in atombios_crtc_program_ss()
501 args.v2.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
515 args.v2.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in atombios_crtc_program_ss()
516 args.v2.usSpreadSpectrumStep = cpu_to_le16(ss->step); in atombios_crtc_program_ss()
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| /drivers/infiniband/sw/rdmavt/ |
| D | rc.c | 204 u32 rvt_restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe, u32 len) in rvt_restart_sge() argument
206 ss->sge = wqe->sg_list[0]; in rvt_restart_sge()
207 ss->sg_list = wqe->sg_list + 1; in rvt_restart_sge()
208 ss->num_sge = wqe->wr.num_sge; in rvt_restart_sge()
209 ss->total_len = wqe->length; in rvt_restart_sge()
210 rvt_skip_sge(ss, len, false); in rvt_restart_sge()
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